
5 Dec
2010
5 Dec
'10
3:27 p.m.
Hi,
On a custom 460EX board I have a 2Gbyte NAND device, 1Gbyte per chip select. I'm trying to enable support for the second NAND CS, so far without success.
U-Boot properly detects both devices, (manufacturer, size, bus width). First device works as expected, on second device bad blocks are reported correctly, but attempt to erase the device results in I/O errors on every block. The bank settings are identical for both chips.
What am I missing ?
BTW, I was wandering why NAND TLB window size on Canyonlands is 16Mbytes. Also, why NAND start address for TLB mapping is calculated as CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS
Thanks in advance.
Felix.