This commit converts mccmon6's u-boot proper (in a single commit to avoid build breaks) to use solely DM/DTS.
The DTS description of the mccmon6 has been ported from Linux kernel (v4.20, SHA1: 8fe28cb58bcb235034b64cbbb7550a8a43fd88be)
Signed-off-by: Lukasz Majewski lukma@denx.de ---
arch/arm/dts/Makefile | 1 + arch/arm/dts/imx6q-mccmon6.dts | 382 +++++++++++++++++++++++++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 7 + board/liebherr/mccmon6/mccmon6.c | 161 ----------------- configs/mccmon6_nor_defconfig | 31 +++- configs/mccmon6_sd_defconfig | 29 ++- include/configs/mccmon6.h | 13 -- 7 files changed, 444 insertions(+), 180 deletions(-) create mode 100644 arch/arm/dts/imx6q-mccmon6.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 83058c4452..0a5b13c35d 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -548,6 +548,7 @@ dtb-$(CONFIG_MX6QDL) += \ imx6q-icore.dtb \ imx6q-icore-mipi.dtb \ imx6q-icore-rqs.dtb \ + imx6q-mccmon6.dtb \ imx6q-sabreauto.dtb \ imx6q-sabresd.dtb \ imx6dl-sabreauto.dtb \ diff --git a/arch/arm/dts/imx6q-mccmon6.dts b/arch/arm/dts/imx6q-mccmon6.dts new file mode 100644 index 0000000000..27cde56115 --- /dev/null +++ b/arch/arm/dts/imx6q-mccmon6.dts @@ -0,0 +1,382 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 + * Lukasz Majewski, DENX Software Engineering, lukma@denx.de + * + * SPDX-License-Identifier: GPL-2.0+ or X11 + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include "imx6q.dtsi" + +/ { + model = "Liebherr Nenzig (LWN) iMX6Q"; + compatible = "lwn,imx6-mccmon6", "fsl,imx6"; + + aliases { + mmc0 = &usdhc3; + mmc1 = &usdhc2; + spi0 = &ecspi3; + }; + + chosen { + stdout-path = &uart1; + }; + + memory@10000000 { + reg = <0x10000000 0x80000000>; + }; +}; + +&ecspi3 { + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs &pinctrl_ecspi3_flwp>; + spi-max-frequency = <25000000>; + status = "okay"; + + s25sl032p: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <40000000>; + reg = <0>; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; + phy-reset-duration = <10>; + phy-reset-post-delay = <1>; + /* KSZ9031 PHY SKEW setup - old values * 60 ps */ + rxc-skew-ps = <1860>; + txc-skew-ps = <1860>; + txen-skew-ps = <900>; + rxdv-skew-ps = <900>; + rxd0-skew-ps = <180>; + rxd1-skew-ps = <180>; + rxd2-skew-ps = <180>; + rxd3-skew-ps = <180>; + txd0-skew-ps = <120>; + txd1-skew-ps = <300>; + txd2-skew-ps = <0>; + txd3-skew-ps = <120>; + status = "okay"; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + pfuze100: pmic@8 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3950000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; +}; + +&weim { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>; + ranges = <0 0 0x08000000 0x08000000>; + status = "okay"; + + nor@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x02000000>; + #address-cells = <1>; + #size-cells = <1>; + bank-width = <2>; + use-advanced-sector-protection; + fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000 + 0x0000c000 0x1404a38e 0x00000000>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_ecspi3: ecspi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 + >; + }; + + pinctrl_ecspi3_cs: ecspi3csgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 + >; + }; + + pinctrl_ecspi3_flwp: ecspi3flwpgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x80000000 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0 + >; + }; + + pinctrl_hog: hoggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 + MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059 + >; + }; + + pinctrl_weim_cs0: weimcs0grp { + fsl,pins = < + MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1 + >; + }; + + pinctrl_weim_nor: weimnorgrp { + fsl,pins = < + MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1 + MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1 + MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060 + MX6QDL_PAD_EIM_D16__EIM_DATA16 0x1b0b0 + MX6QDL_PAD_EIM_D17__EIM_DATA17 0x1b0b0 + MX6QDL_PAD_EIM_D18__EIM_DATA18 0x1b0b0 + MX6QDL_PAD_EIM_D19__EIM_DATA19 0x1b0b0 + MX6QDL_PAD_EIM_D20__EIM_DATA20 0x1b0b0 + MX6QDL_PAD_EIM_D21__EIM_DATA21 0x1b0b0 + MX6QDL_PAD_EIM_D22__EIM_DATA22 0x1b0b0 + MX6QDL_PAD_EIM_D23__EIM_DATA23 0x1b0b0 + MX6QDL_PAD_EIM_D24__EIM_DATA24 0x1b0b0 + MX6QDL_PAD_EIM_D25__EIM_DATA25 0x1b0b0 + MX6QDL_PAD_EIM_D26__EIM_DATA26 0x1b0b0 + MX6QDL_PAD_EIM_D27__EIM_DATA27 0x1b0b0 + MX6QDL_PAD_EIM_D28__EIM_DATA28 0x1b0b0 + MX6QDL_PAD_EIM_D29__EIM_DATA29 0x1b0b0 + MX6QDL_PAD_EIM_D30__EIM_DATA30 0x1b0b0 + MX6QDL_PAD_EIM_D31__EIM_DATA31 0x1b0b0 + MX6QDL_PAD_EIM_A23__EIM_ADDR23 0xb0b1 + MX6QDL_PAD_EIM_A22__EIM_ADDR22 0xb0b1 + MX6QDL_PAD_EIM_A21__EIM_ADDR21 0xb0b1 + MX6QDL_PAD_EIM_A20__EIM_ADDR20 0xb0b1 + MX6QDL_PAD_EIM_A19__EIM_ADDR19 0xb0b1 + MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0b1 + MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0b1 + MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0b1 + MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1 + MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1 + MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1 + MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1 + MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1 + MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1 + MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1 + MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1 + MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1 + MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1 + MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1 + MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1 + MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1 + MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1 + MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1 + MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1 + >; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; + bus-width = <4>; + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; + non-removable; + no-1-8-v; + keep-power-in-suspend; + status = "okay"; +}; diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index f513c4c06f..2703c7bf21 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -217,6 +217,13 @@ config TARGET_MCCMON6 bool "mccmon6" select MX6QDL select SUPPORT_SPL + select DM + select DM_GPIO + select DM_ETH + select DM_SERIAL + select DM_I2C + select DM_SPI + imply CMD_DM
config TARGET_MX6CUBOXI bool "Solid-run mx6 boards" diff --git a/board/liebherr/mccmon6/mccmon6.c b/board/liebherr/mccmon6/mccmon6.c index 946b91f3a1..497095572e 100644 --- a/board/liebherr/mccmon6/mccmon6.c +++ b/board/liebherr/mccmon6/mccmon6.c @@ -12,17 +12,13 @@ #include <asm/arch/sys_proto.h> #include <asm/gpio.h> #include <asm/mach-imx/iomux-v3.h> -#include <asm/mach-imx/mxc_i2c.h> -#include <asm/mach-imx/spi.h> #include <asm/mach-imx/boot_mode.h> #include <asm/io.h> #include <fsl_esdhc.h> #include <mmc.h> #include <netdev.h> -#include <micrel.h> #include <phy.h> #include <input.h> -#include <i2c.h> #include <spl.h>
DECLARE_GLOBAL_DATA_PTR; @@ -35,24 +31,11 @@ DECLARE_GLOBAL_DATA_PTR; PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ PAD_CTL_SRE_FAST | PAD_CTL_HYS)
-#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) - -#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) - -#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ - PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ - PAD_CTL_ODE | PAD_CTL_SRE_FAST) - #define WEIM_NOR_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
#define USDHC2_CD_GPIO IMX_GPIO_NR(1, 4) -#define ETH_PHY_RESET IMX_GPIO_NR(1, 27) -#define ECSPI3_CS0 IMX_GPIO_NR(4, 24) -#define ECSPI3_FLWP IMX_GPIO_NR(4, 27) #define NOR_WP IMX_GPIO_NR(1, 1) #define DISPLAY_EN IMX_GPIO_NR(1, 2)
@@ -93,45 +76,11 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_RST__SD3_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL)), };
-static iomux_v3_cfg_t const enet_pads[] = { - IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL - | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK - | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), - IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL - | MUX_PAD_CTRL(ENET_PAD_CTRL)), - /* KSZ9031 PHY Reset */ - IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL)), -}; - static void setup_iomux_uart(void) { SETUP_IOMUX_PADS(uart1_pads); }
-static void setup_iomux_enet(void) -{ - SETUP_IOMUX_PADS(enet_pads); - - /* Reset KSZ9031 PHY */ - gpio_direction_output(ETH_PHY_RESET, 0); - mdelay(10); - gpio_set_value(ETH_PHY_RESET, 1); - udelay(100); -} - static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC2_BASE_ADDR}, @@ -273,74 +222,6 @@ static void setup_eimnor(void) eimnor_cs_setup(); }
-/* mccmon6 board has SPI Flash is connected to SPI3 */ -int board_spi_cs_gpio(unsigned bus, unsigned cs) -{ - return (bus == 2 && cs == 0) ? ECSPI3_CS0 : -1; -} - -static iomux_v3_cfg_t const ecspi3_pads[] = { - /* SPI3 */ - IOMUX_PADS(PAD_DISP0_DAT3__GPIO4_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL)), - IOMUX_PADS(PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)), - IOMUX_PADS(PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL)), - IOMUX_PADS(PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)), -}; - -void setup_spi(void) -{ - SETUP_IOMUX_PADS(ecspi3_pads); - - enable_spi_clk(true, 2); - - /* set cs0 to high */ - gpio_direction_output(ECSPI3_CS0, 1); - - /* set flwp to high */ - gpio_direction_output(ECSPI3_FLWP, 1); -} - -struct i2c_pads_info mx6q_i2c1_pad_info = { - .scl = { - .i2c_mode = MX6Q_PAD_CSI0_DAT9__I2C1_SCL - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6Q_PAD_CSI0_DAT9__GPIO5_IO27 - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(5, 27) - }, - .sda = { - .i2c_mode = MX6Q_PAD_CSI0_DAT8__I2C1_SDA - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6Q_PAD_CSI0_DAT8__GPIO5_IO26 - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(5, 26) - } -}; - -struct i2c_pads_info mx6q_i2c2_pad_info = { - .scl = { - .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(4, 12) - }, - .sda = { - .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 - | MUX_PAD_CTRL(I2C_PAD_CTRL), - .gp = IMX_GPIO_NR(4, 13) - } -}; - -int board_eth_init(bd_t *bis) -{ - setup_iomux_enet(); - - return cpu_eth_init(bis); -} - int board_early_init_f(void) { setup_iomux_uart(); @@ -356,10 +237,6 @@ int board_init(void) gpio_direction_output(DISPLAY_EN, 1);
setup_eimnor(); - setup_spi(); - - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c1_pad_info); - setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c2_pad_info);
return 0; } @@ -378,44 +255,6 @@ int checkboard(void) return 0; }
-int board_phy_config(struct phy_device *phydev) -{ - /* - * Default setting for GMII Clock Pad Skew Register 0x1EF: - * MMD Address 0x2h, Register 0x8h - * - * GTX_CLK Pad Skew 0xF -> 0.9 nsec skew - * RX_CLK Pad Skew 0xF -> 0.9 nsec skew - * - * Adjustment -> write 0x3FF: - * GTX_CLK Pad Skew 0x1F -> 1.8 nsec skew - * RX_CLK Pad Skew 0x1F -> 1.8 nsec skew - * - */ - ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x3FF); - - ksz9031_phy_extended_write(phydev, 0x02, - MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x00FF); - - ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x3333); - - ksz9031_phy_extended_write(phydev, 0x2, - MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, - MII_KSZ9031_MOD_DATA_NO_POST_INC, - 0x2052); - - if (phydev->drv->config) - phydev->drv->config(phydev); - - return 0; -} - #ifdef CONFIG_SPL_BOARD_INIT void spl_board_init(void) { diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index ddbcd69316..770ef9bed6 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -9,6 +9,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_nor.cfg" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOUNCE_BUFFER=y @@ -16,18 +17,28 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_CMD_CLK=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +# CONFIG_CMD_PINMUX is not set CONFIG_CMD_SF=y CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor),128k@0x1980000(kernel-dtb.nor),128k@0x19C0000(swupdate-kernel-dtb.nor)" +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y @@ -37,16 +48,30 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y -CONFIG_SF_DEFAULT_BUS=2 +CONFIG_SF_DEFAULT_BUS=0 CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +# CONFIG_SPECIFY_CONSOLE_INDEX is not set +# CONFIG_SPL_SERIAL_PRESENT is not set +# CONFIG_TPL_SERIAL_PRESENT is not set +CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y -CONFIG_OF_LIBFDT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index a018d804f8..9a11b59738 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -10,6 +10,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_SPL=y # CONFIG_CMD_BMODE is not set CONFIG_DISTRO_DEFAULTS=y +CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/liebherr/mccmon6/mon6_imximage_sd.cfg" # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOUNCE_BUFFER=y @@ -17,18 +18,28 @@ CONFIG_SPL_TEXT_BASE=0x00908000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y +CONFIG_CMD_CLK=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +# CONFIG_CMD_PINMUX is not set CONFIG_CMD_SF=y CONFIG_CMD_CACHE=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_MTDPARTS=y CONFIG_MTDIDS_DEFAULT="nor0=8000000.nor" CONFIG_MTDPARTS_DEFAULT="mtdparts=8000000.nor:32m@0x0(mccmon6-image.nor),256k@0x40000(u-boot-env.nor),1m@0x80000(u-boot.nor),8m@0x180000(kernel.nor),8m@0x980000(swupdate-kernel.nor),8m@0x1180000(swupdate-rootfs.nor),128k@0x1980000(kernel-dtb.nor),128k@0x19C0000(swupdate-kernel-dtb.nor)" +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-mccmon6" CONFIG_ENV_IS_IN_FLASH=y CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_MXC=y +CONFIG_SYS_I2C_MXC_I2C1=y +CONFIG_SYS_I2C_MXC_I2C2=y +CONFIG_DM_MMC=y CONFIG_FSL_ESDHC=y CONFIG_MTD=y CONFIG_MTD_NOR_FLASH=y @@ -38,16 +49,28 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_FLASH_CFI_MTD=y CONFIG_SYS_FLASH_PROTECTION=y CONFIG_SYS_FLASH_CFI=y +CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH=y -CONFIG_SF_DEFAULT_BUS=2 CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=25000000 CONFIG_SPI_FLASH_SPANSION=y CONFIG_PHYLIB=y CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y +CONFIG_FEC_MXC=y +CONFIG_RGMII=y CONFIG_MII=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_DM_PMIC=y +# CONFIG_SPL_PMIC_CHILDREN is not set +CONFIG_DM_PMIC_PFUZE100=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y +# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +# CONFIG_SPL_SERIAL_PRESENT is not set +# CONFIG_TPL_SERIAL_PRESENT is not set +CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_MXC_SPI=y CONFIG_DM_THERMAL=y -CONFIG_OF_LIBFDT=y diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 667dac7340..b25aacbf41 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -34,22 +34,12 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
-#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_LATE_INIT - -#define CONFIG_MXC_UART #define CONFIG_MXC_UART_BASE UART1_BASE
#define CONFIG_SYS_MEMTEST_START 0x10000000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
-/* I2C Configs */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_MXC -#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ -#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ -#define CONFIG_SYS_I2C_SPEED 100000 - /* MMC Configuration */ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 @@ -66,10 +56,7 @@ #define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) }
/* Ethernet Configuration */ -#define CONFIG_FEC_MXC #define IMX_FEC_BASE ENET_BASE_ADDR -#define CONFIG_FEC_XCV_TYPE RGMII -#define CONFIG_ETHPRIME "FEC" #define CONFIG_FEC_MXC_PHYADDR 1
#define CONFIG_EXTRA_ENV_SETTINGS \