Define CONFIG_USB_GADGET_DWC2_PHY_8_BIT to allow the physical interface to be 8-bit (rather than 16-bit).
Signed-off-by: Steve Rae srae@broadcom.com ---
drivers/usb/gadget/dwc2_udc_otg.c | 4 ++++ include/configs/bcm28155_ap.h | 1 + 2 files changed, 5 insertions(+)
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c b/drivers/usb/gadget/dwc2_udc_otg.c index cb20b00..a95c8d5 100644 --- a/drivers/usb/gadget/dwc2_udc_otg.c +++ b/drivers/usb/gadget/dwc2_udc_otg.c @@ -415,7 +415,11 @@ static void reconfig_usbd(struct dwc2_udc *dev) |0<<7 /* Ulpi DDR sel*/ |0<<6 /* 0: high speed utmi+, 1: full speed serial*/ |0<<4 /* 0: utmi+, 1:ulpi*/ +#ifdef CONFIG_USB_GADGET_DWC2_PHY_8_BIT + |0<<3 /* phy i/f 0:8bit, 1:16bit*/ +#else |1<<3 /* phy i/f 0:8bit, 1:16bit*/ +#endif |0x7<<0; /* HS/FS Timeout**/
if (dev->pdata->usb_gusbcfg) diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 889e5db..e04cfbe 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -134,6 +134,7 @@ #define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_FASTBOOT_BUF_SIZE (CONFIG_SYS_SDRAM_SIZE - SZ_1M) #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE +#define CONFIG_USB_GADGET_DWC2_PHY_8_BIT #define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY #define CONFIG_USBID_ADDR 0x34052c46