Move all the nodes only shown in u-boot to -u-boot.dtsi to make rk3328.dtsi clean.
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
arch/arm/dts/rk3328-evb-u-boot.dtsi | 31 +++----------- arch/arm/dts/rk3328-evb.dts | 5 --- arch/arm/dts/rk3328-rock64-u-boot.dtsi | 33 ++------------- arch/arm/dts/rk3328-u-boot.dtsi | 58 ++++++++++++++++++++++++++ arch/arm/dts/rk3328.dtsi | 24 ----------- 5 files changed, 66 insertions(+), 85 deletions(-) create mode 100644 arch/arm/dts/rk3328-u-boot.dtsi
diff --git a/arch/arm/dts/rk3328-evb-u-boot.dtsi b/arch/arm/dts/rk3328-evb-u-boot.dtsi index 58ebf52b4b..4a827063c5 100644 --- a/arch/arm/dts/rk3328-evb-u-boot.dtsi +++ b/arch/arm/dts/rk3328-evb-u-boot.dtsi @@ -1,33 +1,12 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2016 Rockchip Electronics Co., Ltd + * (C) Copyright 2016-2019 Rockchip Electronics Co., Ltd */
+#include "rk3328-u-boot.dtsi" #include "rk3328-sdram-ddr3-666.dtsi"
-/ { - aliases { - mmc0 = &emmc; - mmc1 = &sdmmc; - }; - - chosen { - u-boot,spl-boot-order = &emmc, &sdmmc; - }; -}; - -&cru { - u-boot,dm-pre-reloc; -}; - -&uart2 { - u-boot,dm-pre-reloc; -}; - -&emmc { - u-boot,dm-pre-reloc; -}; - -&sdmmc { - u-boot,dm-pre-reloc; +&usb_host0_xhci { + vbus-supply = <&vcc5v0_host_xhci>; + status = "okay"; }; diff --git a/arch/arm/dts/rk3328-evb.dts b/arch/arm/dts/rk3328-evb.dts index ec594a8452..a2ee838fcd 100644 --- a/arch/arm/dts/rk3328-evb.dts +++ b/arch/arm/dts/rk3328-evb.dts @@ -116,11 +116,6 @@ status = "okay"; };
-&usb_host0_xhci { - vbus-supply = <&vcc5v0_host_xhci>; - status = "okay"; -}; - &i2c1 { clock-frequency = <400000>; i2c-scl-rising-time-ns = <168>; diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi index 21c2afca3c..1d441f7124 100644 --- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi @@ -1,38 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0+ /* - * (C) Copyright 2018 Rockchip Electronics Co., Ltd - * - * SPDX-License-Identifier: GPL-2.0+ + * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd */
+#include "rk3328-u-boot.dtsi" #include "rk3328-sdram-lpddr3-1600.dtsi"
-/ { - aliases { - mmc0 = &emmc; - mmc1 = &sdmmc; - }; - - chosen { - u-boot,spl-boot-order = &emmc, &sdmmc; - }; -}; - -&cru { - u-boot,dm-pre-reloc; -}; - -&uart2 { - u-boot,dm-pre-reloc; -}; - -&emmc { - u-boot,dm-pre-reloc; -}; - -&sdmmc { - u-boot,dm-pre-reloc; -}; - &usb_host0_xhci { status = "okay"; }; diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi new file mode 100644 index 0000000000..ffbd657e31 --- /dev/null +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -0,0 +1,58 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2019 Rockchip Electronics Co., Ltd + */ + +/ { + aliases { + mmc0 = &emmc; + mmc1 = &sdmmc; + }; + + chosen { + u-boot,spl-boot-order = &emmc, &sdmmc; + }; + + dmc: dmc { + u-boot,dm-pre-reloc; + compatible = "rockchip,rk3328-dmc"; + reg = <0x0 0xff400000 0x0 0x1000 + 0x0 0xff780000 0x0 0x3000 + 0x0 0xff100000 0x0 0x1000 + 0x0 0xff440000 0x0 0x1000 + 0x0 0xff720000 0x0 0x1000 + 0x0 0xff798000 0x0 0x1000>; + }; + + usb_host0_xhci: usb@ff600000 { + compatible = "rockchip,rk3328-xhci"; + reg = <0x0 0xff600000 0x0 0x100000>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; + snps,dis-enblslpm-quirk; + snps,phyif-utmi-bits = <16>; + snps,dis-u2-freeclk-exists-quirk; + snps,dis-u2-susphy-quirk; + status = "disabled"; + }; +}; + +&cru { + u-boot,dm-pre-reloc; +}; + +&grf { + u-boot,dm-pre-reloc; +}; + +&uart2 { + u-boot,dm-pre-reloc; + clock-frequency = <24000000>; +}; + +&emmc { + u-boot,dm-pre-reloc; +}; + +&sdmmc { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/rk3328.dtsi b/arch/arm/dts/rk3328.dtsi index a080ae8d69..060c84e6c0 100644 --- a/arch/arm/dts/rk3328.dtsi +++ b/arch/arm/dts/rk3328.dtsi @@ -186,7 +186,6 @@ };
grf: syscon@ff100000 { - u-boot,dm-pre-reloc; compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; reg = <0x0 0xff100000 0x0 0x1000>;
@@ -232,7 +231,6 @@ interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; clock-names = "baudclk", "apb_pclk"; - clock-frequency = <24000000>; reg-shift = <2>; reg-io-width = <4>; dmas = <&dmac 6>, <&dmac 7>; @@ -351,17 +349,6 @@ status = "disabled"; };
- dmc: dmc { - u-boot,dm-pre-reloc; - compatible = "rockchip,rk3328-dmc"; - reg = <0x0 0xff400000 0x0 0x1000 - 0x0 0xff780000 0x0 0x3000 - 0x0 0xff100000 0x0 0x1000 - 0x0 0xff440000 0x0 0x1000 - 0x0 0xff720000 0x0 0x1000 - 0x0 0xff798000 0x0 0x1000>; - }; - cru: clock-controller@ff440000 { compatible = "rockchip,rk3328-cru", "rockchip,cru", "syscon"; reg = <0x0 0xff440000 0x0 0x1000>; @@ -512,17 +499,6 @@ status = "disabled"; };
- usb_host0_xhci: usb@ff600000 { - compatible = "rockchip,rk3328-xhci"; - reg = <0x0 0xff600000 0x0 0x100000>; - interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; - snps,dis-enblslpm-quirk; - snps,phyif-utmi-bits = <16>; - snps,dis-u2-freeclk-exists-quirk; - snps,dis-u2-susphy-quirk; - status = "disabled"; - }; - gic: interrupt-controller@ffb70000 { compatible = "arm,gic-400"; #interrupt-cells = <3>;