
7 Feb
2015
7 Feb
'15
11:46 p.m.
Dear Bo Shen,
Bo Shen voice.shen@atmel.com writes:
The SAMAA5D4 SoC can access DDR in interleave mode.
Signed-off-by: Bo Shen voice.shen@atmel.com
Changes in v2: None
arch/arm/cpu/at91-common/mpddrc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
applied to u-boot-atmel/master, thanks!
Best regards, Andreas Bießmann