Device tree alignment with Linux kernel v5.17-rc1 - ARM: dts: stm32: add pull-up to USART3 and UART7 RX pins on STM32MP15 DKx boards - ARM: dts: stm32: clean uart4_idle_pins_a node for stm32mp15 - ARM: dts: stm32: tune the HS USB PHYs on stm32mp15xx-dkx - ARM: dts: stm32: tune the HS USB PHYs on stm32mp157c-ev1 - ARM: dts: stm32: fix stusb1600 pinctrl used on stm32mp157c-dk
Signed-off-by: Patrick Delaunay patrick.delaunay@foss.st.com ---
arch/arm/dts/stm32mp15-pinctrl.dtsi | 32 ++++++++++++++--------------- arch/arm/dts/stm32mp157c-ev1.dts | 22 ++++++++++++++++++++ arch/arm/dts/stm32mp15xx-dkx.dtsi | 16 +++++++++++++++ 3 files changed, 54 insertions(+), 16 deletions(-)
diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index d3553e0f01..6161f5906e 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -1718,7 +1718,7 @@
stusb1600_pins_a: stusb1600-0 { pins { - pinmux = <STM32_PINMUX('I', 11, ANALOG)>; + pinmux = <STM32_PINMUX('I', 11, GPIO)>; bias-pull-up; }; }; @@ -1737,20 +1737,20 @@ };
uart4_idle_pins_a: uart4-idle-0 { - pins1 { - pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */ - }; - pins2 { - pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ - bias-disable; - }; + pins1 { + pinmux = <STM32_PINMUX('G', 11, ANALOG)>; /* UART4_TX */ + }; + pins2 { + pinmux = <STM32_PINMUX('B', 2, AF8)>; /* UART4_RX */ + bias-disable; + }; };
uart4_sleep_pins_a: uart4-sleep-0 { - pins { + pins { pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* UART4_TX */ <STM32_PINMUX('B', 2, ANALOG)>; /* UART4_RX */ - }; + }; };
uart4_pins_b: uart4-1 { @@ -1816,7 +1816,7 @@ }; pins2 { pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */ - bias-disable; + bias-pull-up; }; };
@@ -1826,7 +1826,7 @@ }; pins2 { pinmux = <STM32_PINMUX('E', 7, AF7)>; /* UART7_RX */ - bias-disable; + bias-pull-up; }; };
@@ -1971,7 +1971,7 @@ pins2 { pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ <STM32_PINMUX('I', 10, AF8)>; /* USART3_CTS_NSS */ - bias-disable; + bias-pull-up; }; };
@@ -1988,7 +1988,7 @@ }; pins3 { pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ - bias-disable; + bias-pull-up; }; };
@@ -2012,7 +2012,7 @@ pins2 { pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */ <STM32_PINMUX('B', 13, AF7)>; /* USART3_CTS_NSS */ - bias-disable; + bias-pull-up; }; };
@@ -2029,7 +2029,7 @@ }; pins3 { pinmux = <STM32_PINMUX('B', 12, AF8)>; /* USART3_RX */ - bias-disable; + bias-pull-up; }; };
diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts index 5c5b1ddf7b..e222d2d2cb 100644 --- a/arch/arm/dts/stm32mp157c-ev1.dts +++ b/arch/arm/dts/stm32mp157c-ev1.dts @@ -375,3 +375,25 @@ &usbphyc { status = "okay"; }; + +&usbphyc_port0 { + st,tune-hs-dc-level = <2>; + st,enable-fs-rftime-tuning; + st,enable-hs-rftime-reduction; + st,trim-hs-current = <15>; + st,trim-hs-impedance = <1>; + st,tune-squelch-level = <3>; + st,tune-hs-rx-offset = <2>; + st,no-lsfs-sc; +}; + +&usbphyc_port1 { + st,tune-hs-dc-level = <2>; + st,enable-fs-rftime-tuning; + st,enable-hs-rftime-reduction; + st,trim-hs-current = <15>; + st,trim-hs-impedance = <1>; + st,tune-squelch-level = <3>; + st,tune-hs-rx-offset = <2>; + st,no-lsfs-sc; +}; diff --git a/arch/arm/dts/stm32mp15xx-dkx.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi index 5502eec94b..f8130bf445 100644 --- a/arch/arm/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi @@ -702,10 +702,26 @@
&usbphyc_port0 { phy-supply = <&vdd_usb>; + st,tune-hs-dc-level = <2>; + st,enable-fs-rftime-tuning; + st,enable-hs-rftime-reduction; + st,trim-hs-current = <15>; + st,trim-hs-impedance = <1>; + st,tune-squelch-level = <3>; + st,tune-hs-rx-offset = <2>; + st,no-lsfs-sc; };
&usbphyc_port1 { phy-supply = <&vdd_usb>; + st,tune-hs-dc-level = <2>; + st,enable-fs-rftime-tuning; + st,enable-hs-rftime-reduction; + st,trim-hs-current = <15>; + st,trim-hs-impedance = <1>; + st,tune-squelch-level = <3>; + st,tune-hs-rx-offset = <2>; + st,no-lsfs-sc; };
&vrefbuf {