8 Dec
2019
8 Dec
'19
5:26 a.m.
On Sun, Dec 8, 2019 at 11:58 AM Bin Meng bmeng.cn@gmail.com wrote:
On Sat, Dec 7, 2019 at 12:52 PM Simon Glass sjg@chromium.org wrote:
In TPL we want to reduce code size and support running with CONFIG_PCI disabled. Add special code to handle this using a fixed BAR programmed into the SPI on boot. Also cache the SPI flash to speed up boot.
Signed-off-by: Simon Glass sjg@chromium.org
Changes in v6:
- Add a comment about why we should not use MTRR_TYPE_WRBACK
- Use SZ_4G instead of open-coding the size value
Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None
Reviewed-by: Bin Meng bmeng.cn@gmail.com
applied to u-boot-x86/next, thanks!