On Sat, Mar 30, 2024 at 11:53:38AM +0100, Jonas Karlman wrote:
Hi Chris,
On 2024-03-30 06:05, Chris Morgan wrote:
From: Chris Morgan macromorgan@hotmail.com
Add SoC specific RAM bank logic for the rk3588 boards. This logic works by reading the ATAGS created by the ROCKCHIP_TPL stage and applies fixups on those to ensure we aren't stepping on any reserved memory addresses.
The existing logic requires us to define memory holes to allow devices with 16GB or more RAM to function properly, as well as blocking up to 256MB of otherwise accessible RAM.
Looks good at first glance, will runtime test later.
Thank you, I look forward to the results. I had mainline running some stress-ng memory tests last night and all appeared well for me on my 16GB board. Touching the RAM code for 1 (now 2) entire SoCs is just something I wanted a bit more eyes on though.
Please move this out from being RK3588 specific, my prior request to depend on !IS_ENABLED(CONFIG_ROCKCHIP_EXTERNAL_TPL) was so that this also gets used on RK356x. On 4 GiB RAM RK356x boards the same 256 MiB could be reclaimed with this.
Will do, I'll also test this on my 3566 boards. I don't think I lost any memory on those though, but then again I never had more than 2GB to work with...
For final patch submission please also remove all duplicated RK3588 board implementations of ft_board_setup() that adds reserved memory nodes to DT, they are no longer needed after this.
Will do, thank you.
Chris
Regards, Jonas
Signed-off-by: Chris Morgan macromorgan@hotmail.com
arch/arm/mach-rockchip/rk3588/rk3588.c | 93 ++++++++++++++++++++++++++ 1 file changed, 93 insertions(+)