Signed-off-by: Joe Hershberger joe.hershberger@ni.com Cc: Joe Hershberger joe.hershberger@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: - Moved changes to board/freescale/mpc8313erdb/mpc8313erdb.c from patch 1/2 Changes for v3: - Renamed gpio_init_* to mpc83xx_gpio_init_* - Added board_early_init_r support to MPC8313ERDB targets Changes for v4: - Fixed build warning Changes for v5:
board/freescale/mpc8313erdb/mpc8313erdb.c | 15 +++++++++++++++ include/configs/MPC8313ERDB.h | 8 ++++++-- 2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c index 08f873d..730ec4e 100644 --- a/board/freescale/mpc8313erdb/mpc8313erdb.c +++ b/board/freescale/mpc8313erdb/mpc8313erdb.c @@ -31,6 +31,9 @@ #include <vsc7385.h> #include <ns16550.h> #include <nand.h> +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) +#include <asm/gpio.h> +#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -42,6 +45,18 @@ int board_early_init_f(void) if (im->pmc.pmccr1 & PMCCR1_POWER_OFF) gd->flags |= GD_FLG_SILENT; #endif +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_f(); +#endif + + return 0; +} + +int board_early_init_r(void) +{ +#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL) + mpc83xx_gpio_init_r(); +#endif
return 0; } diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h index 92c54d0..bf17e41 100644 --- a/include/configs/MPC8313ERDB.h +++ b/include/configs/MPC8313ERDB.h @@ -82,7 +82,8 @@
#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ +#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ +#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */
#define CONFIG_SYS_IMMR 0xE0000000
@@ -322,6 +323,9 @@ #define CONFIG_OF_BOARD_SETUP 1 #define CONFIG_OF_STDOUT_VIA_ALIAS 1
+#define CONFIG_MPC83XX_GPIO 1 +#define CONFIG_CMD_GPIO 1 + /* * Serial Port */ @@ -535,7 +539,7 @@
/* System IO Config */ #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -#define CONFIG_SYS_SICRL SICRL_USBDR_10 /* Enable Internal USB Phy */ +#define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC) /* Enable Internal USB Phy and GPIO on LCD Connector */
#define CONFIG_SYS_HID0_INIT 0x000000000 #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \