From: Radhey Shyam Pandey radhey.shyam.pandey@xilinx.com
TZ_DDR_RAM on reset is in secure mode. Since uboot and linux runs in full TZ privilege secure mode, no need to set DDR trustzone to non-secure.
Signed-off-by: Radhey Shyam Pandey radheys@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com --- arch/arm/cpu/armv7/zynq/cpu.c | 2 -- 1 file changed, 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/zynq/cpu.c b/arch/arm/cpu/armv7/zynq/cpu.c index 0ca5d8a..9af340e 100644 --- a/arch/arm/cpu/armv7/zynq/cpu.c +++ b/arch/arm/cpu/armv7/zynq/cpu.c @@ -29,8 +29,6 @@ int arch_cpu_init(void) writel(0x1F, &slcr_base->ocm_cfg); /* FPGA_RST_CTRL, clear resets on AXI fabric ports */ writel(0x0, &slcr_base->fpga_rst_ctrl); - /* TZ_DDR_RAM, Set DDR trust zone non-secure */ - writel(0xFFFFFFFF, &slcr_base->trust_zone); /* Set urgent bits with register */ writel(0x0, &slcr_base->ddr_urgent_sel); /* Urgent write, ports S2/S3 */ -- 1.8.2.3