5 Nov
2016
5 Nov
'16
5:12 p.m.
On 3 November 2016 at 05:05, Phil Edworthy phil.edworthy@renesas.com wrote:
The IP supports two ports, A and B, each providing up to 32 gpios. The driver already creates a 2nd gpio bank by reading the 2nd node from DT, so this is quite a simple change to support the 2nd bank.
Signed-off-by: Phil Edworthy phil.edworthy@renesas.com
v3: Pass the bank nr to the register offset macro, to cope with irregular register locations. v2: Use an offset element in the platform data instead of if-elses.
drivers/gpio/dwapb_gpio.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-)
Reviewed-by: Simon Glass sjg@chromium.org