Re: [U-Boot] [PATCH 1/3] fsl_sec: fix register layout on Layerscape architectures

30 Jan 2019


      On 1/30/2019 2:01 PM, laurentiu.tudor@nxp.com wrote:
...
From: Laurentiu Tudor laurentiu.tudor@nxp.com
On Layerscape architectures the SEC memory map is 1MB and the
register blocks contained in it are 64KB aligned, not 4KB as
the ccsr_sec structure currently assumes. Fix the layout of
the structure for these architectures.
Signed-off-by: Laurentiu Tudor laurentiu.tudor@nxp.com
For the series:
Reviewed-by: Horia Geantă horia.geanta@nxp.com
Thanks,
Horia

Re: [U-Boot] [PATCH 1/3] fsl_sec: fix register layout on Layerscape architectures

Horia Geanta