FIT checksum validation is very slow in SPL due to D-cache not being enabled.
Enable caches in SPL to speed up FIT checksum validation, from seconds to milliseconds.
Signed-off-by: Jonas Karlman jonas@kwiboo.se --- I am not sure if it is even a good idea to enable caches in SPL, if this is the best way to enable caches and maybe this should be behind a Kconfig option?
Have only been able to runtime test this on RK3328, RK3399 and RK3568.
Any advice on this would be grateful.
Regards, Jonas
arch/arm/mach-rockchip/spl.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-rockchip/spl.c b/arch/arm/mach-rockchip/spl.c index 30be64042521..29fe3353105b 100644 --- a/arch/arm/mach-rockchip/spl.c +++ b/arch/arm/mach-rockchip/spl.c @@ -149,6 +149,10 @@ void board_init_f(ulong dummy) } gd->ram_top = gd->ram_base + get_effective_memsize(); gd->ram_top = board_get_usable_ram_top(gd->ram_size); + gd->relocaddr = gd->ram_top; + + arch_reserve_mmu(); + enable_caches(); #endif preloader_console_init(); }