Add gpio mux settings for the Allwinner R40/V40 CPU. The gigabit ethernet interface can only be routed to a fixed set of pins.
Signed-off-by: Lothar Felten lothar.felten@gmail.com --- arch/arm/dts/sun8i-r40.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi index 48ec2e855a..ee22f6eb3a 100644 --- a/arch/arm/dts/sun8i-r40.dtsi +++ b/arch/arm/dts/sun8i-r40.dtsi @@ -126,6 +126,15 @@ #interrupt-cells = <3>; #gpio-cells = <3>;
+ gmac_pins_rgmii: gmac_rgmii { + pins = "PA0", "PA1", "PA2", + "PA3", "PA4", "PA5", "PA6", + "PA7", "PA8", "PA10", + "PA11", "PA12", "PA13", + "PA15", "PA16"; + function = "gmac"; + }; + i2c0_pins: i2c0_pins { pins = "PB0", "PB1"; function = "i2c0";