Am 02.11.23 um 00:21 schrieb Tom Rini:
On Wed, Nov 01, 2023 at 07:23:24PM +0100, Wadim Egorov wrote:
Hi Dhruva,
Am 01.11.23 um 16:57 schrieb Dhruva Gole:
Hi,
On Oct 31, 2023 at 14:37:31 +0100, Wadim Egorov wrote:
Add basic support for PHYTEC phyCORE-AM62x SoM.
Supported features: - 2GB DDR4 RAM - eMMC Flash - OSPI NOR Flash - external uSD - Ethernet - debug UART
Product page SoM: https://www.phytec.com/product/phycore-am62x
Signed-off-by: Wadim Egorov w.egorov@phytec.de
arch/arm/dts/Makefile | 4 +- .../arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi | 2190 +++++++++++++++++ arch/arm/dts/k3-am62-phycore-som.dtsi | 324 +++ .../k3-am625-phyboard-lyra-rdk-u-boot.dtsi | 229 ++ arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts | 266 ++ arch/arm/dts/k3-am625-phycore-som-binman.dtsi | 532 ++++ arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts | 134 + arch/arm/mach-k3/Kconfig | 1 + board/phytec/phycore_am62x/Kconfig | 52 + board/phytec/phycore_am62x/MAINTAINERS | 15 + board/phytec/phycore_am62x/Makefile | 8 + board/phytec/phycore_am62x/board-cfg.yaml | 36 + board/phytec/phycore_am62x/phycore-am62x.c | 59 + board/phytec/phycore_am62x/phycore_am62x.env | 23 + board/phytec/phycore_am62x/pm-cfg.yaml | 12 + board/phytec/phycore_am62x/rm-cfg.yaml | 1088 ++++++++ board/phytec/phycore_am62x/sec-cfg.yaml | 379 +++ configs/phycore_am62x_a53_defconfig | 116 + configs/phycore_am62x_r5_defconfig | 131 + include/configs/phycore_am62x.h | 15 + 20 files changed, 5613 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/k3-am62-phycore-som-ddr4-2gb.dtsi create mode 100644 arch/arm/dts/k3-am62-phycore-som.dtsi create mode 100644 arch/arm/dts/k3-am625-phyboard-lyra-rdk-u-boot.dtsi create mode 100644 arch/arm/dts/k3-am625-phyboard-lyra-rdk.dts create mode 100644 arch/arm/dts/k3-am625-phycore-som-binman.dtsi create mode 100644 arch/arm/dts/k3-am625-r5-phycore-som-2gb.dts create mode 100644 board/phytec/phycore_am62x/Kconfig create mode 100644 board/phytec/phycore_am62x/MAINTAINERS create mode 100644 board/phytec/phycore_am62x/Makefile create mode 100644 board/phytec/phycore_am62x/board-cfg.yaml create mode 100644 board/phytec/phycore_am62x/phycore-am62x.c create mode 100644 board/phytec/phycore_am62x/phycore_am62x.env create mode 100644 board/phytec/phycore_am62x/pm-cfg.yaml create mode 100644 board/phytec/phycore_am62x/rm-cfg.yaml create mode 100644 board/phytec/phycore_am62x/sec-cfg.yaml create mode 100644 configs/phycore_am62x_a53_defconfig create mode 100644 configs/phycore_am62x_r5_defconfig create mode 100644 include/configs/phycore_am62x.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 55aceb51cd..8b371266dc 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1383,7 +1383,9 @@ dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \ k3-am625-beagleplay.dtb \ k3-am625-r5-beagleplay.dtb \ k3-am625-verdin-wifi-dev.dtb \
k3-am625-verdin-r5.dtb
k3-am625-verdin-r5.dtb \k3-am625-phyboard-lyra-rdk.dtb \k3-am625-r5-phycore-som-2gb.dtbThanks for upstreaming Wadim!
However I would prefer that you split all these patches into smaller chunks for each file (preferrably) or group together files that have like 20-30 lines of changes.
Hm, seems to be difficult and not really reasonable to split like that. The big files are generated files or copy pasted from TI's evm. So I do not think they need a big attention in the review process.
- All yaml files are identical to TI's evm
- k3-am62-phycore-som-ddr4-2gb.dtsi generated with TI's SysConfig DDR Tool
- k3-am62-phycore-som.dtsi & k3-am625-phyboard-lyra-rdk.dts are 1:1 copies
from vanilla Linux tree
The rest is pretty small and reviewable IMO.
I agree, I should have created a cover letter. I can do that in the next series.
Please let me know if you still want me to split it into more patches. But it would be nice if you could tell me how to split it exactly without ending up with broken pieces.
Yes, I don't see the value in splitting this up further, but we do need to note where the upstream dts files are synced from.
Took the devicetrees from linux v6.6-rc7. I can mention that in the commit message in a v2.