With driver model we will have access to a bank pointer, so we want to use it rather than converting back to a number, and then back to a bank pointer. Add functions to provide this feature.
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v2: None
arch/arm/cpu/armv7/sunxi/pinmux.c | 32 +++++++++++++++++++++----------- arch/arm/include/asm/arch-sunxi/gpio.h | 4 +++- 2 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c b/arch/arm/cpu/armv7/sunxi/pinmux.c index 1f2843f..b026f78 100644 --- a/arch/arm/cpu/armv7/sunxi/pinmux.c +++ b/arch/arm/cpu/armv7/sunxi/pinmux.c @@ -10,32 +10,42 @@ #include <asm/io.h> #include <asm/arch/gpio.h>
-int sunxi_gpio_set_cfgpin(u32 pin, u32 val) +void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val) { - u32 bank = GPIO_BANK(pin); - u32 index = GPIO_CFG_INDEX(pin); - u32 offset = GPIO_CFG_OFFSET(pin); - struct sunxi_gpio *pio = BANK_TO_GPIO(bank); + u32 index = GPIO_CFG_INDEX(bank_offset); + u32 offset = GPIO_CFG_OFFSET(bank_offset);
clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset); - - return 0; }
-int sunxi_gpio_get_cfgpin(u32 pin) +void sunxi_gpio_set_cfgpin(u32 pin, u32 val) { - u32 cfg; u32 bank = GPIO_BANK(pin); - u32 index = GPIO_CFG_INDEX(pin); - u32 offset = GPIO_CFG_OFFSET(pin); struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
+ sunxi_gpio_set_cfgbank(pio, pin, val); +} + +int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset) +{ + u32 index = GPIO_CFG_INDEX(bank_offset); + u32 offset = GPIO_CFG_OFFSET(bank_offset); + u32 cfg; + cfg = readl(&pio->cfg[0] + index); cfg >>= offset;
return cfg & 0xf; }
+int sunxi_gpio_get_cfgpin(u32 pin) +{ + u32 bank = GPIO_BANK(pin); + struct sunxi_gpio *pio = BANK_TO_GPIO(bank); + + return sunxi_gpio_get_cfgbank(pio, pin); +} + int sunxi_gpio_set_drv(u32 pin, u32 val) { u32 bank = GPIO_BANK(pin); diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index f7f3d8c..f72e2fd 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -139,7 +139,9 @@ enum sunxi_gpio_number { #define SUNXI_GPIO_PULL_UP 1 #define SUNXI_GPIO_PULL_DOWN 2
-int sunxi_gpio_set_cfgpin(u32 pin, u32 val); +void sunxi_gpio_set_cfgbank(struct sunxi_gpio *pio, int bank_offset, u32 val); +void sunxi_gpio_set_cfgpin(u32 pin, u32 val); +int sunxi_gpio_get_cfgbank(struct sunxi_gpio *pio, int bank_offset); int sunxi_gpio_get_cfgpin(u32 pin); int sunxi_gpio_set_drv(u32 pin, u32 val); int sunxi_gpio_set_pull(u32 pin, u32 val);