No need to check the region range and send commands when the cache isn't even enabled.
Signed-off-by: Gary Bisson gary.bisson@boundarydevices.com --- Hi all,
This is a follow-up to this thread: https://lists.denx.de/pipermail/u-boot/2017-March/283423.html
Although what started the conversation was the sparse-image flashing procedure, it appears cache maintenance functions don't check on cache status.
Regards, Gary --- arch/arm/cpu/armv7/cache_v7.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/arch/arm/cpu/armv7/cache_v7.c b/arch/arm/cpu/armv7/cache_v7.c index c4bbcc3cc3..992cdeaa6e 100644 --- a/arch/arm/cpu/armv7/cache_v7.c +++ b/arch/arm/cpu/armv7/cache_v7.c @@ -117,6 +117,9 @@ void flush_dcache_all(void) */ void invalidate_dcache_range(unsigned long start, unsigned long stop) { + if (!dcache_status()) + return; + check_cache_range(start, stop);
v7_dcache_maint_range(start, stop, ARMV7_DCACHE_INVAL_RANGE); @@ -131,6 +134,9 @@ void invalidate_dcache_range(unsigned long start, unsigned long stop) */ void flush_dcache_range(unsigned long start, unsigned long stop) { + if (!dcache_status()) + return; + check_cache_range(start, stop);
v7_dcache_maint_range(start, stop, ARMV7_DCACHE_CLEAN_INVAL_RANGE);