Signed-off-by: John Rigby john.rigby@linaro.org CC: Scott Wood scootwood@freescale.com --- drivers/mtd/nand/omap_gpmc.c | 36 ++++++++++++++++++++++++++++++++++++ 1 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 99b9cef..4c76544 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -29,6 +29,28 @@ #include <linux/mtd/nand_ecc.h> #include <nand.h>
+#ifdef CONFIG_NAND_SPL +/* in the early stage of NAND flash booting, printf() is not available */ +#define printf(fmt, args...) + +static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ + int i; + struct nand_chip *chip = mtd->priv; + +#ifndef CONFIG_SYS_NAND_BUSWIDTH_16 + for (i = 0; i < len; i++) + buf[i] = readb(chip->IO_ADDR_R); +#else + u16 *p = (u16 *) buf; + + len >>= 1; + for (i = 0; i < len; i++) + p[i] = readw(chip->IO_ADDR_R); +#endif +} +#endif + static uint8_t cs; static struct nand_ecclayout hw_nand_oob = GPMC_NAND_HW_ECC_LAYOUT;
@@ -224,6 +246,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode) } }
+#ifndef CONFIG_NAND_SPL /* * omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc. * The default is to come up on s/w ecc @@ -280,6 +303,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS; } +#endif
/* * Board-specific NAND initialization. The following members of the @@ -337,8 +361,20 @@ int board_nand_init(struct nand_chip *nand) nand->options |= NAND_BUSWIDTH_16;
nand->chip_delay = 100; +#ifndef CONFIG_NAND_SPL /* Default ECC mode */ nand->ecc.mode = NAND_ECC_SOFT; +#else + nand->ecc.mode = NAND_ECC_HW; + nand->ecc.layout = &hw_nand_oob; + nand->ecc.size = 512; + nand->ecc.bytes = 3; + nand->ecc.hwctl = omap_enable_hwecc; + nand->ecc.correct = omap_correct_data; + nand->ecc.calculate = omap_calculate_ecc; + nand->read_buf = nand_read_buf; + omap_hwecc_init(nand); +#endif
return 0; }