Here a patch against u-boot 1.1.4 to support "sleep" mode for mips processors. I tested this feature on Au1100 based board.
The patch add a new define CFG_WAKEUP_MODE and a new per-board function lowlevel_wakeup().
The define is used to mask the new function if you don't need "sleep" support and the lowlevel_wakeup() is needed since the wake up sequence may be different from the boot one.
Regards,
Rodolfo
cpu/mips/start.S | 59 +++++++++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 53 insertions(+), 6 deletions(-)
Rodolfo Giometti: Support for "sleep" mode added.
diff-tree eb1d649... (from 05d8dce...) Author: Rodolfo Giometti giometti@enneenne.com Date: Fri Mar 31 18:33:38 2006 +0200
Support for "sleep" mode added.
diff-tree eb1d6496e7428e5e6e20887bfb5edd6989d2169f (from 05d8dce9d07cf4073ea15fbc448c1ce22b6baf0f) Author: Rodolfo Giometti giometti@zaigor.enneenne.com Date: Fri Mar 31 18:33:38 2006 +0200
Support for "sleep" mode added.
diff --git a/cpu/mips/start.S b/cpu/mips/start.S index e91e213..72f17ee 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -26,6 +26,7 @@ #include <config.h> #include <version.h> #include <asm/regdef.h> +#include <asm/au1x00.h> #include <asm/mipsregs.h>
@@ -252,12 +253,6 @@ reset: nop #endif
- /* Initialize any external memory. - */ - la t9, lowlevel_init - jalr t9 - nop - /* Initialize caches... */ la t9, mips_cache_reset @@ -269,6 +264,58 @@ reset: li t0, CONF_CM_CACHABLE_NONCOHERENT mtc0 t0, CP0_CONFIG
+#ifdef CFG_WAKEUP_MODE + /* Now check the wakeup cause + */ + li t0, SYS_WAKESRC + lw t1, 0(t0) + andi t1, t1, 0x00000002 /* check the SW bit */ + beq zero, t1, 1f + nop + +#if 0 + /* Infinite loop to allow JTAG attach after sleep mode (debug only) + */ +2: li t1, 0 + beq t1, zero, 2b + nop +#endif + + /* Wakeup any external memory. + */ + la t9, lowlevel_wakeup + jalr t9 + nop + + /* Jump into the Linux code + */ + li t0, SYS_SCRATCH0 + lw t1, 0(t0) + move sp, t1 + li t0, SYS_SCRATCH1 + lw t1, 0(t0) + j t1 /* this cause a jump into already + nop frozen Linux (brr! :) */ + + /* If we reach this point we come from a normal system power up, + so just clear the wakeup cause registers and call the + lowlevel_init function as normal + */ +#endif + +1: li t0, SYS_WAKEMSK + li t1, 0x00000000 + sw t1, 0(t0) + + li t0, SYS_WAKESRC + li t1, 0x00000000 + sw t1, 0(t0) + + /* Initialize any external memory. + */ + la t9, lowlevel_init + jalr t9 + nop
/* Set up temporary stack. */