
Hi Jim
On 5/18/22 14:11, Jim Liu wrote:
Hi Jaehoon
Thanks for your reply. NPCM750 main patch is upstream on uboot master.
Sorry. I missed them. Thanks for sharing an information.
it can build on uboot master branch. The default config is poleg_evb_defconfig and the log is as below:
U-Boot 2022.07-rc2-00065-gc387e62614 (May 18 2022 - 10:19:05 +0800)
CPU: NPCM750 A1 @ Model: Nuvoton npcm750 Development Board (Device Tree) DRAM: 464 MiB Core: 23 devices, 9 uclasses, devicetree: separate MMC: Loading Environment from SPIFlash... Invalid bus 0 (err=-19) *** Warning - spi_flash_probe_bus_cs() failed, using default environment
In: serial@1000 Out: serial@1000 Err: serial@1000 Net: No ethernet found. Hit any key to stop autoboot: 0 U-Boot>
And now I want to add some extra features for NPCM750. If you have any questions or please let me know. I will wait for your suggestions.
On Tue, May 17, 2022 at 5:42 PM Jaehoon Chung jh80.chung@samsung.com wrote:
Hi,
On 5/17/22 17:26, Jim Liu wrote:
Add Nuvoton BMC NPCM750 mmc control driver.
There is no where this driver is building. If you have more patch to upstream, I think that it's better to send as patchset than now.
Best Regards, Jaehoon Chung
Signed-off-by: Jim Liu JJLIU0@nuvoton.com
drivers/mmc/Kconfig | 12 ++++++ drivers/mmc/Makefile | 1 + drivers/mmc/npcm_sdhci.c | 89 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 102 insertions(+) create mode 100644 drivers/mmc/npcm_sdhci.c
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index f04cc44e19..49850f5d40 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -607,6 +607,18 @@ config MMC_SDHCI_MV
If unsure, say N.
+config MMC_SDHCI_NPCM
bool "SDHCI support on Nuvoton NPCM device"
depends on MMC_SDHCI
depends on DM_MMC
help
This selects the Secure Digital Host Controller Interface (SDHCI)
on Nuvoton NPCM devic.
s/devic/device
If you have a controller with this interface, say Y here.
If unsure, say N.
config MMC_SDHCI_PIC32 bool "Microchip PIC32 on-chip SDHCI support" depends on DM_MMC && MACH_PIC32 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 9627509302..280da24567 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -67,6 +67,7 @@ obj-$(CONFIG_MMC_SDHCI_IPROC) += iproc_sdhci.o obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o obj-$(CONFIG_MMC_SDHCI_MSM) += msm_sdhci.o obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o +obj-$(CONFIG_MMC_SDHCI_NPCM) += npcm_sdhci.o obj-$(CONFIG_MMC_SDHCI_PIC32) += pic32_sdhci.o obj-$(CONFIG_MMC_SDHCI_ROCKCHIP) += rockchip_sdhci.o obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o diff --git a/drivers/mmc/npcm_sdhci.c b/drivers/mmc/npcm_sdhci.c new file mode 100644 index 0000000000..baec994e85 --- /dev/null +++ b/drivers/mmc/npcm_sdhci.c @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: GPL-2.0+ +/*
- Copyright (c) 2021 Nuvoton Technology Corp.
2022?
- */
+#include <common.h> +#include <dm.h> +#include <sdhci.h> +#include <clk.h> +#include <power/regulator.h>
+#define NPCM_SDHC_MIN_FREQ 400000
+struct npcm_sdhci_plat {
struct mmc_config cfg;
struct mmc mmc;
+};
+static int npcm_sdhci_probe(struct udevice *dev) +{
struct npcm_sdhci_plat *plat = dev_get_plat(dev);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct sdhci_host *host = dev_get_priv(dev);
struct udevice *vqmmc_supply;
int vqmmc_uv, ret;
struct clk clk;
host->name = dev->name;
host->ioaddr = dev_read_addr_ptr(dev);
host->max_clk = dev_read_u32_default(dev, "clock-frequency", 0);
ret = clk_get_by_index(dev, 0, &clk);
if (!ret && host->max_clk) {
ret = clk_set_rate(&clk, host->max_clk);
if (ret < 0)
return ret;
}
if (IS_ENABLED(CONFIG_DM_REGULATOR)) {
device_get_supply_regulator(dev, "vqmmc-supply", &vqmmc_supply);
vqmmc_uv = dev_read_u32_default(dev, "vqmmc-microvolt", 0);
/* Set IO voltage */
if (vqmmc_supply && vqmmc_uv)
regulator_set_value(vqmmc_supply, vqmmc_uv);
Is it enabled by default?
}
host->index = dev_read_u32_default(dev, "index", 0);
host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
host->host_caps |= MMC_MODE_1BIT;
if (host->bus_width == 8)
host->host_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
else if (host->bus_width == 4)
host->host_caps |= MMC_MODE_4BIT;
Use mmc_of_parse().
host->mmc = &plat->mmc;
host->mmc->priv = host;
host->mmc->dev = dev;
upriv->mmc = host->mmc;
ret = sdhci_setup_cfg(&plat->cfg, host, 0, NPCM_SDHC_MIN_FREQ);
if (ret)
return ret;
return sdhci_probe(dev);
+}
+static int npcm_sdhci_bind(struct udevice *dev) +{
struct npcm_sdhci_plat *plat = dev_get_plat(dev);
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
+}
+static const struct udevice_id npcm_mmc_ids[] = {
{ .compatible = "nuvoton,npcm750-sdhci" },
{ .compatible = "nuvoton,npcm845-sdhci" },
{ }
+};
+U_BOOT_DRIVER(npcm_sdc_drv) = {
npsm_sdhci_drv?
Best Regards, Jaehoon Chung
.name = "npcm_sdhci",
.id = UCLASS_MMC,
.of_match = npcm_mmc_ids,
.ops = &sdhci_ops,
.bind = npcm_sdhci_bind,
.probe = npcm_sdhci_probe,
.priv_auto = sizeof(struct sdhci_host),
.plat_auto = sizeof(struct npcm_sdhci_plat),
+};