Enable Secure IOU setup to enable U-Boot to run in EL3 without setting from ATF.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/cpu/armv8/zynqmp/Kconfig | 4 ++++ arch/arm/include/asm/arch-zynqmp/hardware.h | 4 ++++ 2 files changed, 8 insertions(+)
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig index c8fcfb6abbc1..5f797406bf86 100644 --- a/arch/arm/cpu/armv8/zynqmp/Kconfig +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig @@ -20,4 +20,8 @@ config SYS_SOC config SYS_CONFIG_NAME default "xilinx_zynqmp_ep" if TARGET_ZYNQMP_EP
+config SECURE_IOU + bool "Configure ZynqMP secure IOU" + default n + endif diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 7640eabad13e..f655d72d2ce1 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -44,7 +44,11 @@ struct crlapb_regs {
#define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR)
+#if defined(CONFIG_SECURE_IOU) +#define ZYNQMP_IOU_SCNTR 0xFF260000 +#else #define ZYNQMP_IOU_SCNTR 0xFF250000 +#endif #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_EN 0x1 #define ZYNQMP_IOU_SCNTR_COUNTER_CONTROL_REGISTER_HDBG 0x2