On Wed, Dec 18, 2013 at 14:05 -0600, Chin Liang See wrote:
To add the Cadence SPI driver support for Altera SOCFPGA. It required information such as clocks and timing from platform's configuration header file within include/configs folder
Signed-off-by: Chin Liang See clsee@altera.com Cc: Jagannadha Sutradharudu Teki jaganna@xilinx.com
drivers/spi/Makefile | 1 + drivers/spi/cadence_qspi.c | 337 ++++++++++++++++ drivers/spi/cadence_qspi.h | 56 +++ drivers/spi/cadence_qspi_apb.c | 873 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 1267 insertions(+) create mode 100644 drivers/spi/cadence_qspi.c create mode 100644 drivers/spi/cadence_qspi.h create mode 100644 drivers/spi/cadence_qspi_apb.c
Can you please add the information which header file is required? And do I get it right that this header file does not come with the source but is provided "externally" to the U-Boot project?
Does this mean that compilation breaks if one enables the Cadence QSPI controller in the config and does not provide the header file which is not documented as a dependency? It would be nice to have a more visible warning about this, or better documentation of the requirements. If the content of the file or required settings are not documented, users should at least be able to learn which external tool can generate/provide the file and how to make it available to the U-Boot project source.
It's probably best to provide a specific example file for an eval board. So interested persons can see the file name, its location, its content, and can either use it or adjust it to their needs depending on whether they use the eval board or some similar design of their own.
virtually yours Gerhard Sittig