Implement a sata driver for Synopsys DWC sata device based on U-boot driver model.
Signed-off-by: Mugunthan V N mugunthanvnm@ti.com --- arch/arm/cpu/armv7/omap-common/sata.c | 2 + drivers/block/Kconfig | 7 ++++ drivers/block/Makefile | 1 + drivers/block/dwc_ahci.c | 71 +++++++++++++++++++++++++++++++++++ 4 files changed, 81 insertions(+) create mode 100644 drivers/block/dwc_ahci.c
diff --git a/arch/arm/cpu/armv7/omap-common/sata.c b/arch/arm/cpu/armv7/omap-common/sata.c index 5ebd799..e47e01b 100644 --- a/arch/arm/cpu/armv7/omap-common/sata.c +++ b/arch/arm/cpu/armv7/omap-common/sata.c @@ -40,6 +40,7 @@ int enable_sata_phy(void) return phy_pipe3_power_on(&sata_phy); }
+#ifndef CONFIG_SATA int init_sata(int dev) { int ret; @@ -73,3 +74,4 @@ void scsi_bus_reset(void) ahci_reset((void __iomem *)DWC_AHSATA_BASE); ahci_init((void __iomem *)DWC_AHSATA_BASE); } +#endif diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig index 44d8a6b..6b94c3f 100644 --- a/drivers/block/Kconfig +++ b/drivers/block/Kconfig @@ -7,4 +7,11 @@ config SATA Enable driver model for block devices like SCSI. It uses the same API as block, but now implemented by the uclass.
+config DWC_AHCI + bool "Enable Synopsys DWC AHCI driver support" + depends on SATA + help + Enable this driver to support Sata devices through + Synopsys DWC AHCI module. + endmenu diff --git a/drivers/block/Makefile b/drivers/block/Makefile index c2dae17..189d17f 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile @@ -6,6 +6,7 @@ #
obj-$(CONFIG_SATA) += sata-uclass.o +obj-$(CONFIG_DWC_AHCI) += dwc_ahci.o
obj-$(CONFIG_SCSI_AHCI) += ahci.o obj-$(CONFIG_DWC_AHSATA) += dwc_ahsata.o diff --git a/drivers/block/dwc_ahci.c b/drivers/block/dwc_ahci.c new file mode 100644 index 0000000..b6c3bba --- /dev/null +++ b/drivers/block/dwc_ahci.c @@ -0,0 +1,71 @@ +/* + * DWC SATA platform driver + * + * (C) Copyright 2016 + * Texas Instruments Incorporated, <www.ti.com> + * + * Author: Mugunthan V N mugunthanvnm@ti.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <dm.h> +#include <ahci.h> +#include <sata.h> +#include <asm/arch/sata.h> +#include <asm/io.h> + +struct dwc_ahci_priv { + void *base; + void *wrapper_base; +}; + +static int dwc_ahci_ofdata_to_platdata(struct udevice *dev) +{ + struct dwc_ahci_priv *priv = dev_get_priv(dev); + fdt_addr_t addr; + + priv->base = (void *)dev_get_addr(dev); + + addr = dev_get_addr_index(dev, 1); + priv->wrapper_base = (addr != FDT_ADDR_T_NONE) ? (void *)addr : NULL; + + return 0; +} + +static int dwc_ahci_probe(struct udevice *dev) +{ + struct dwc_ahci_priv *priv = dev_get_priv(dev); + int ret; + + if (priv->wrapper_base) { + u32 val = TI_SATA_IDLE_NO | TI_SATA_STANDBY_NO; + + /* Enable SATA module, No Idle, No Standby */ + writel(val, priv->wrapper_base + TI_SATA_SYSCONFIG); + } + + ret = enable_sata_phy(); + if (ret) { + error("Sata phy enable failed\n"); + return ret; + } + + return ahci_init(priv->base); +} + +static const struct udevice_id dwc_ahci_ids[] = { + { .compatible = "snps,dwc-ahci" }, + { } +}; + +U_BOOT_DRIVER(dwc_ahci) = { + .name = "dwc_ahci", + .id = UCLASS_SATA, + .of_match = dwc_ahci_ids, + .ofdata_to_platdata = dwc_ahci_ofdata_to_platdata, + .probe = dwc_ahci_probe, + .priv_auto_alloc_size = sizeof(struct dwc_ahci_priv), + .flags = DM_FLAG_ALLOC_PRIV_DMA, +};