MPC8379E RM says (10-34): Once LCRR[CLKDIV] is written, the register should be read, and then an isync should be executed. So update this in code. Also define a LCRR mask for processors, which uses not all bits in the LCRR register (as for example mpc832x did).
Signed-off-by: Heiko Schocher hs@denx.de --- changes since v1: - added comment from DaveLiu. moved LCRR setting to cpu_init_r()
changes since v2: - added comment from Kim Phillips changed LCRR_MASK to 0x7fffffff use clrsetbits()
cpu/mpc83xx/cpu_init.c | 17 +++++++++++++---- include/mpc83xx.h | 5 +++++ 2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c index ea4f2af..c51924f 100644 --- a/cpu/mpc83xx/cpu_init.c +++ b/cpu/mpc83xx/cpu_init.c @@ -23,8 +23,8 @@ #include <common.h> #include <mpc83xx.h> #include <ioports.h> -#ifdef CONFIG_USB_EHCI_FSL #include <asm/io.h> +#ifdef CONFIG_USB_EHCI_FSL #include <usb/ehci-fsl.h> #endif
@@ -193,9 +193,6 @@ void cpu_init_f (volatile immap_t * im) */ im->reset.rmr = (RMR_CSRE & (1<<RMR_CSRE_SHIFT));
- /* LCRR - Clock Ratio Register (10.3.1.16) */ - im->lbus.lcrr = CONFIG_SYS_LCRR; - /* Enable Time Base & Decrimenter ( so we will have udelay() )*/ im->sysconf.spcr |= SPCR_TBEN;
@@ -329,8 +326,20 @@ void cpu_init_f (volatile immap_t * im)
int cpu_init_r (void) { + volatile immap_t *im = (volatile immap_t *)CONFIG_SYS_IMMR; #ifdef CONFIG_QE uint qe_base = CONFIG_SYS_IMMR + 0x00100000; /* QE immr base */ +#endif + + /* LCRR - Clock Ratio Register (10.3.1.16) */ + clrsetbits_be32(&im->lbus.lcrr, LCRR_MASK, CONFIG_SYS_LCRR); + /* MPC8379E RM 10-34 says after writting this register + * the register should be reread and an isync should be + * executed. + */ + in_be32(&im->lbus.lcrr); + +#ifdef CONFIG_QE qe_init(qe_base); qe_reset(); #endif diff --git a/include/mpc83xx.h b/include/mpc83xx.h index 44115c9..15440b5 100644 --- a/include/mpc83xx.h +++ b/include/mpc83xx.h @@ -198,6 +198,7 @@ #define SICRL_URT_CTPR 0x06000000 #define SICRL_IRQ_CTPR 0x00C00000
+#define LCRR_MASK 0x7fffffff #elif defined(CONFIG_MPC8313) /* SICRL bits - MPC8313 specific */ #define SICRL_LBC 0x30000000 @@ -1200,6 +1201,10 @@
#define PEX_GCLK_RATIO 0x440
+#if !defined(LCRR_MASK) +#define LCRR_MASK 0xFFFFFFFF +#endif + #ifndef __ASSEMBLY__ struct pci_region; void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot);