RE: [v1 5/5] arm: socfpga: Restructure Stratix10 and Agilex handoff code

24 Mar 2021

      ...
-----Original Message-----
From: Lim, Elly Siew Chin elly.siew.chin.lim@intel.com
Sent: Wednesday, March 24, 2021 11:02 AM
To: Tan, Ley Foon ley.foon.tan@intel.com; u-boot@lists.denx.de
Cc: Marek Vasut marex@denx.de; See, Chin Liang
chin.liang.see@intel.com; Simon Goldschmidt
simon.k.r.goldschmidt@gmail.com; Chee, Tien Fong
tien.fong.chee@intel.com; Westergreen, Dalon
dalon.westergreen@intel.com; Simon Glass sjg@chromium.org; Gan,
Yau Wai yau.wai.gan@intel.com
Subject: RE: [v1 5/5] arm: socfpga: Restructure Stratix10 and Agilex handoff
code
Hi Ley Foon,
...
...

+int socfpga_handoff_read(void *handoff_address, void *table, u32
table_len,

	 enum endianness big_endian)

+{

u32 temp, i;
u32 *table_x32 = table;

debug("%s: handoff addr = 0x%p ", __func__, (u32

*)handoff_address);

if (big_endian) {
if (swab32(readl(SOC64_HANDOFF_BASE)) ==

SOC64_HANDOFF_MAGIC_BOOT) {

	debug("Handoff table address = 0x%p ", table_x32);

	debug("table length = 0x%x\n", table_len);

	debug("%s: handoff data =\n{\n", __func__);

	for (i = 0; i < table_len; i++) {

		temp = readl(handoff_address +

			     SOC64_HANDOFF_OFFSET_DATA +

			     (i * sizeof(u32)));

		*table_x32 = swab32(temp);

		if (!(i % 2))

			debug(" No.%d Addr 0x%08x: ", i,

			      *table_x32);

		else

			debug(" 0x%08x\n", *table_x32);

		table_x32++;

	}

	debug("\n}\n");

} else {

	debug("%s: Cannot find

SOC64_HANDOFF_MAGIC_BOOT ", __func__);

	debug("at addr  0x%p\n", (u32 *)handoff_address);

	return -EPERM;

}

}

How about if it is little endian, why don't need to fill up table_x32?
The little endian only needed in new Intel SOC N5X (Diamond Mesa) , we will
upstream this part together with N5X patches later.
Then can return error if doesn't support little endian as now.