Hi Alexey,
On 11/29/2013 04:41 PM, Alexey Brodkin wrote:
Hi Jaehoon,
On Fri, 2013-11-29 at 12:46 +0900, Jaehoon Chung wrote:
Hi, Alexey,
I didn't know exactly which version is used this register. I known this register is used only the exynos series. I have checked the IP version 2.70a, but CLKSEL(0x9c) wasn't used at general register map.
If I missed the something, let me know.(It's published the upper IP version than 2.70a)
The main point of my patch was to remove "#include <asm/arch/dwmmc.h>" from "dwmmc.c".
Oh, Sorry. I didn't recognize this point.
I think it's pretty clear that if any particular device driver is implemented not in your "board" folder but in common "drivers" folder it is sort of expected to be independent from architecture/platform, right?
Right. This point is correct. If other soc is used the dw-mmc controller, then this header file can't refer.
And for simplicity I copy-pasted all defines from "arch/arm/include/asm/arch-exynos/dwmmc.h" to common "include/dwmmc.h".
I think good that just removed the "#include <asm/arch/dwmmc.h>". Instead, Exnyos specific code can move into dw-mmc-exynos.c with callback function. (I didn't know whcih Soc is used with MPSCTRL register.)
Which was a bit too recklessly from my side - I should have spend so more time and come up with more accurate solution which I will do now with v2 re-spin.
As for DWMCI_CLKSEL. I checked the same version of databook for DesignWare Mobile Storage and do see there a register with offset = 0x9c.
This is:
DSCADDRU (For 64-bit Address Configuration Only) Name: Current Host Descriptor Address Upper Register ========
I may understand that your current DW MMC is configured to use 32-bit addresses, right?
Right, i used 32-bit address.
Because of this you selected this offset "0x9c" and experience no problems. But at some point you may get HW configured to use 64-bit addressing and you'll need to use another offset for Exynos-specific things. I understand that as SW engineer you have not much things to do here but would be good if you communicate this to HW engineers.
If other soc is used 0x9c offset as other register? 0x9c is used the CLKSEL at exynos. we need to consider other soc. Then it's good that exynos specific code will move into dw-mmc-exynos.c. isn't?
And indeed this one could be left untouched in "asm/arch-exynos/dwmmc.h".
Also I may see following defines aren't used anywhere in existing (today's "master" branch) U-Boot sources: ======== #define DWMCI_SHIFT_0 0x0 #define DWMCI_SHIFT_1 0x1 #define DWMCI_SHIFT_2 0x2
#define DWMCI_SHIFT_3 0x3
So these might be dumped at all.
This shift define is exynos specific define. But i will think this need or not
Best Regards, Jaehoon Chung
Regards, Alexey