Stefan, Thank you for the feedback
I have another question. UART 0,1,2,3 works fine. UART3 TX works good, but UART RX is not working.
TX data is success, but RX is not working . maybe you can point me to the right direction.
I use pcs440ep.h 's CONFIG_SYS_4xx_GPIO_TABLE ,
Best Regards. Steven.
/* GPIO Core 1 */ \ {GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO32 USB2D_OPMODE0 */ \ {GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO33 USB2D_OPMODE1 */ \ {GPIO1_BASE, GPIO_OUT, GPIO_ALT3, GPIO_OUT_NO_CHG}, /* GPIO34 UART0_DCD_N UART1_DSR_CTS_N UART2_SOUT*/ \ {GPIO1_BASE, GPIO_IN, GPIO_ALT3, GPIO_OUT_NO_CHG}, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \ {GPIO1_BASE, GPIO_IN, GPIO_ALT3, GPIO_OUT_NO_CHG}, /* GPIO36 UART0_8PIN_CTS_N UART3_SIN*/ \ {GPIO1_BASE, GPIO_OUT, GPIO_ALT3, GPIO_OUT_NO_CHG}, /* GPIO37 UART0_RTS_N */ \ {GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_NO_CHG}, /* GPIO38 UART0_DTR_N UART1_SOUT */ \ {GPIO1_BASE, GPIO_IN, GPIO_ALT2, GPIO_OUT_NO_CHG}, /* GPIO39 UART0_RI_N UART1_SIN */ \
-----Original Message----- From: Stefan Roese [mailto:sr@denx.de] Sent: Tuesday, November 11, 2008 4:24 PM To: u-boot@lists.denx.de; k9@tibetsystem.com Subject: Re: [U-Boot] PPC440EP UART 4port enble
On Tuesday 11 November 2008, 조기성 wrote:
We have designed a new PPC440EP yosemite based board. But we are using UART 4port tx,rx( 2pin UART0, 1, 2, 3) But current It only works 2port(UART0, UART1). I read user manual then changed u-boot's GPIO bit flag blows. But it's now working, How can I do that?
I suggest that you switch in your board port to the GPIO multiplexing initialization via the CONFIG_SYS_4xx_GPIO_TABLE definition. As an example for 440EP take a look at the pcs440ep board port. It's easier and less error prone to change the pin configuration in this table.
Best regards, Stefan
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