On Mon, Mar 13, 2023 at 02:31:43PM -0700, Troy Kisky wrote:
This avoids an error when ifdef CONFIG_PCI is changed to if CONFIG_IS_ENABLED(PCI)
Signed-off-by: Troy Kisky troykiskyboundary@gmail.com
(no changes since v2)
Changes in v2:
- use an accessor function gd_set_pci_ram_top
arch/x86/cpu/i386/cpu.c | 2 +- include/asm-generic/global_data.h | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/i386/cpu.c b/arch/x86/cpu/i386/cpu.c index c7f6c5a013e..068670dfc41 100644 --- a/arch/x86/cpu/i386/cpu.c +++ b/arch/x86/cpu/i386/cpu.c @@ -415,7 +415,7 @@ int cpu_phys_address_size(void) /* Don't allow PCI region 3 to use memory in the 2-4GB memory hole */ static void setup_pci_ram_top(void) {
- gd->pci_ram_top = 0x80000000U;
- gd_set_pci_ram_top(0x80000000U);
}
static void setup_mtrr(void) diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 987fb66c17a..952e17b2c13 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -560,6 +560,12 @@ static_assert(sizeof(struct global_data) == GD_SIZE); #define gd_event_state() NULL #endif
+#if CONFIG_IS_ENABLED(PCI) +#define gd_set_pci_ram_top(val) gd->pci_ram_top = val +#else +#define gd_set_pci_ram_top(val) +#endif
/**
- enum gd_flags - global data flags
This ends up being a size change on I think it was coreboot64 and as such I'd like to see it come via the x86 tree, and run time tested first.