We want to know which type of chip we are running on - the Tegra family has several SKUs. This can be determined by reading a fuse register, so add this function to ap20.
Signed-off-by: Simon Glass sjg@chromium.org --- arch/arm/cpu/armv7/tegra2/ap20.c | 24 ++++++++++++++++++++++++ arch/arm/include/asm/arch-tegra2/ap20.h | 7 +++++++ arch/arm/include/asm/arch-tegra2/tegra2.h | 23 +++++++++++++++++++++++ 3 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/tegra2/ap20.c b/arch/arm/cpu/armv7/tegra2/ap20.c index da7128c..311e93f 100644 --- a/arch/arm/cpu/armv7/tegra2/ap20.c +++ b/arch/arm/cpu/armv7/tegra2/ap20.c @@ -26,11 +26,35 @@ #include <asm/arch/ap20.h> #include <asm/arch/clk_rst.h> #include <asm/arch/clock.h> +#include <asm/arch/fuse.h> #include <asm/arch/pmc.h> #include <asm/arch/pinmux.h> #include <asm/arch/scu.h> #include <common.h>
+int tegra_get_chip_type(void) +{ + struct fuse_regs *fuse = (struct fuse_regs *)TEGRA2_FUSE_BASE; + uint tegra_sku_id; + + tegra_sku_id = readl(&fuse->sku_info) & 0xff; + + switch (tegra_sku_id) { + case SKU_ID_T20: + return TEGRA_SOC_T20; + case SKU_ID_T25SE: + case SKU_ID_AP25: + case SKU_ID_T25: + case SKU_ID_AP25E: + case SKU_ID_T25E: + return TEGRA_SOC_T25; + + default: + /* unknown sku id */ + return TEGRA_SOC_UNKNOWN; + } +} + /* Returns 1 if the current CPU executing is a Cortex-A9, else 0 */ static int ap20_cpu_is_cortexa9(void) { diff --git a/arch/arm/include/asm/arch-tegra2/ap20.h b/arch/arm/include/asm/arch-tegra2/ap20.h index a4b4d73..d222c44 100644 --- a/arch/arm/include/asm/arch-tegra2/ap20.h +++ b/arch/arm/include/asm/arch-tegra2/ap20.h @@ -100,3 +100,10 @@ void tegra2_start(void);
/* This is the main entry into U-Boot, used by the Cortex-A9 */ extern void _start(void); + +/** + * Works out the SOC type used for clocks settings + * + * @return SOC type - see TEGRA_SOC... + */ +int tegra_get_chip_type(void); diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h b/arch/arm/include/asm/arch-tegra2/tegra2.h index c4cd9bb..f33726d 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra2.h +++ b/arch/arm/include/asm/arch-tegra2/tegra2.h @@ -59,6 +59,29 @@ struct timerus { unsigned int cntr_1us; }; + +/* Address at which WB code runs, it must not overlap Bootrom's IRAM usage */ +#define AP20_WB_RUN_ADDRESS 0x40020000 + +/* These are the available SKUs (product types) for Tegra */ +enum { + SKU_ID_T20 = 0x8, + SKU_ID_T25SE = 0x14, + SKU_ID_AP25 = 0x17, + SKU_ID_T25 = 0x18, + SKU_ID_AP25E = 0x1b, + SKU_ID_T25E = 0x1c, +}; + +/* These are the SOC categories that affect clocking */ +enum { + TEGRA_SOC_T20, + TEGRA_SOC_T25, + + TEGRA_SOC_COUNT, + TEGRA_SOC_UNKNOWN = -1, +}; + #else /* __ASSEMBLY__ */ #define PRM_RSTCTRL TEGRA2_PMC_BASE #endif