
26 Jun
2012
26 Jun
'12
1:16 a.m.
Dear Joe Hershberger,
Hi Marek,
On Sun, Jun 24, 2012 at 7:17 PM, Marek Vasut marex@denx.de wrote:
This prevents the scenario where data cache is on and the device uses DMA to deploy data. In that case, it might not be possible to flush/invalidate data to RAM properly. The other option is to use bounce buffer, but that involves a lot of copying and therefore degrades performance rapidly. Therefore disallow this possibility of unaligned load address altogether if data cache is on.
Signed-off-by: Marek Vasut marex@denx.de Cc: Joe Hershberger joe.hershberger@gmail.com
Acked-by: Joe Hershberger joe.hershberger@gmail.com
NAK, actually ... let's wait until the discussion is settled ;-)
Best regards, Marek Vasut