On Mon, Feb 02, 2015 at 02:18:24PM +0100, Stefan Roese wrote:
On 28.01.2015 23:28, Luka Perkov wrote:
On Mon, Jan 19, 2015 at 11:33:38AM +0100, Stefan Roese wrote:
This patch adds the DDR3 setup and training code taken from the Marvell U-Boot repository. This code used to be included as a binary (bin_hdr) into the AXP boot image. Not linked with the main U-Boot. With this code addition and the also included SERDES / PHY setup code, the Armada-XP support in mainline U-Boot is finally self-contained. So the complete image for booting can be built from mainline U-Boot. Without any additional external inclusion. Hopefully other MVEBU SoC's will follow here.
Tested on AXP using a SPD DIMM setup on the Marvell DB-MV784MP-GP board and on a custom fixed DDR configuration board (maxbcm with MV78460).
I've tested entire series on Kirkwood board RaidSonic ICY BOX IB-NAS62x0. That said:
Tested-by: Luka Perkov luka.perkov@sartura.hr
Tom, can you pull this series as-is or should I pull it in Marvell tree first?
Tom, any updates on this? I really would like to see this patch series applied for the next release. Its been on the list for quite some while with zero negative feedback so far.
Please make up a PR for it, thanks!