From: Siva Durga Prasad Paladugu siva.durga.paladugu@xilinx.com
Add Kconfig option for ddr init as this might be required in cases like ddr less systems where we want to skip ddrc init and this option is useful for it.
Signed-off-by: Siva Durga Prasad Paladugu sivadur@xilinx.com Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/mach-zynq/Kconfig | 8 ++++++++ arch/arm/mach-zynq/ddrc.c | 4 ++++ 2 files changed, 12 insertions(+)
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index 2529c9ff449d..c428ce5cc70b 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -24,6 +24,14 @@ config SPL_SPI_FLASH_SUPPORT config SPL_SPI_SUPPORT default y if ZYNQ_QSPI
+config ZYNQ_DDRC_INIT + bool "Zynq DDRC initialization" + default y + help + This option used to perform DDR specific initialization + if required. There might be cases like ddr less where we + want to skip ddr init and this option is useful for it. + config SYS_BOARD default "zynq"
diff --git a/arch/arm/mach-zynq/ddrc.c b/arch/arm/mach-zynq/ddrc.c index d74f8dbbc45d..bde52d656203 100644 --- a/arch/arm/mach-zynq/ddrc.c +++ b/arch/arm/mach-zynq/ddrc.c @@ -12,6 +12,9 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifndef CONFIG_ZYNQ_DDRC_INIT +void zynq_ddrc_init(void) {} +#else /* Control regsiter bitfield definitions */ #define ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK 0xC #define ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT 2 @@ -46,3 +49,4 @@ void zynq_ddrc_init(void) puts("ECC disabled "); } } +#endif