On 16:02 Wed 08 Jul , Matthias Weisser wrote:
This patch adds support for MB86R01 'Jade' SoC from Fujitsu
Signed-off-by: Matthias Weisser matthias.weisser@graf-syteco.de
cpu/arm926ejs/jade/Makefile | 47 +++++++++ cpu/arm926ejs/jade/timer.c | 126 ++++++++++++++++++++++++ include/asm-arm/arch-jade/hardware.h | 31 ++++++ include/asm-arm/arch-jade/jade.h | 177 ++++++++++++++++++++++++++++++++++ 4 files changed, 381 insertions(+), 0 deletions(-) create mode 100644 cpu/arm926ejs/jade/Makefile create mode 100644 cpu/arm926ejs/jade/timer.c create mode 100644 include/asm-arm/arch-jade/hardware.h create mode 100644 include/asm-arm/arch-jade/jade.h
diff --git a/cpu/arm926ejs/jade/Makefile b/cpu/arm926ejs/jade/Makefile new file mode 100644 index 0000000..7da9f40 --- /dev/null +++ b/cpu/arm926ejs/jade/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +#
+include $(TOPDIR)/config.mk
+LIB = $(obj)lib$(SOC).a
+COBJS = timer.o +SOBJS =
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +START := $(addprefix $(obj),$(START))
+all: $(obj).depend $(LIB)
+$(LIB): $(OBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
+#########################################################################
+# defines $(obj).depend target +include $(SRCTREE)/rules.mk
+sinclude $(obj).depend
+######################################################################### diff --git a/cpu/arm926ejs/jade/timer.c b/cpu/arm926ejs/jade/timer.c new file mode 100644 index 0000000..2d262c8 --- /dev/null +++ b/cpu/arm926ejs/jade/timer.c @@ -0,0 +1,126 @@ +/*
- (C) Copyright 2007-2008
- Stelian Pop stelian.pop@leadtechdesign.com
- Lead Tech Design <www.leadtechdesign.com>
- Matthias Weisser matthias.weisser@graf-syteco.de
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#include <common.h> +#include <div64.h>
+#define TIMER_LOAD_VAL 0xffffffff +#define TIMER_BASE 0xfffe0000
whitespace please fix
+#define READ_TIMER (*(volatile ulong *)(TIMER_BASE+4)) +#define TIMER_FREQ (CONFIG_JADE_IOCLK / 16)
whitespace please fix
+static ulong timestamp; +static ulong lastdec;
+static inline unsigned long long tick_to_time(unsigned long long tick) +{
- tick *= CONFIG_SYS_HZ;
- do_div(tick, TIMER_FREQ);
- return tick;
+}
+static inline unsigned long long usec_to_tick(unsigned long long usec) +{
- usec *= TIMER_FREQ;
- do_div(usec, 1000000);
- return usec;
+}
+/* nothing really to do with interrupts, just starts up a counter. */ +int timer_init(void) +{
- *(volatile ulong *)(TIMER_BASE + 0) = TIMER_LOAD_VAL;
- *(volatile ulong *)(TIMER_BASE + 8) = 0x86;
please use proper accessor readx/writex
- reset_timer_masked();
- return 0;
+}
+/*
- timer without interrupts
- */
+unsigned long long get_ticks(void) +{
- ulong now = READ_TIMER;
- if (now <= lastdec) /* normal mode (non roll) */
/* move stamp forward with absolut diff ticks */timestamp += (lastdec - now);- else /* we have rollover of incrementer */
timestamp += lastdec + TIMER_LOAD_VAL - now;- lastdec = now;
- return timestamp;
+}
+void reset_timer_masked(void) +{
- /* reset time */
- lastdec = READ_TIMER; /* capture current decrement value time */
- timestamp = 0; /* start "advancing" time stamp from 0 */
+}
+ulong get_timer_masked(void) +{
- return tick_to_time(get_ticks());
+}
+void udelay(unsigned long usec) +{
- unsigned long long tmp;
- ulong tmo;
- tmo = usec_to_tick(usec);
- tmp = get_ticks() + tmo; /* get current timestamp */
- while (get_ticks() < tmp) /* loop till event */
/*NOP*/;+}
+void reset_timer(void) +{
- reset_timer_masked();
+}
+ulong get_timer(ulong base) +{
- return get_timer_masked() - base;
+}
+/*
- This function is derived from PowerPC code (timebase clock frequency).
- On ARM it returns the number of timer ticks per second.
- */
+ulong get_tbclk(void) +{
- ulong tbclk;
- tbclk = CONFIG_SYS_HZ;
- return tbclk;
please return it directly
+} diff --git a/include/asm-arm/arch-jade/hardware.h b/include/asm-arm/arch-jade/hardware.h new file mode 100644 index 0000000..a26bdca --- /dev/null +++ b/include/asm-arm/arch-jade/hardware.h @@ -0,0 +1,31 @@ +/*
- (C) Copyright 2007
- Author : Carsten Schneider, mycable GmbH
<cs@mycable.de>
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H
+#include <asm/sizes.h> +#include <asm/arch/jade.h>
+#endif diff --git a/include/asm-arm/arch-jade/jade.h b/include/asm-arm/arch-jade/jade.h new file mode 100644 index 0000000..c2b28a2 --- /dev/null +++ b/include/asm-arm/arch-jade/jade.h @@ -0,0 +1,177 @@ +/*
- (C) Copyright 2007
- jade definitions
- Author : Carsten Schneider, mycable GmbH
<cs@mycable.de>
- See file CREDITS for list of people who contributed to this
- project.
- This program is free software; you can redistribute it and/or
- modify it under the terms of the GNU General Public License as
- published by the Free Software Foundation; either version 2 of
- the License, or (at your option) any later version.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- MA 02111-1307 USA
- */
+#ifndef JADE_H +#define JADE_H
+typedef volatile unsigned int JREG; /* Hardware register */
+/*
- Physical Address Defines
- */
+#define JADE_GDC_PHYS_BASE 0xf1fc0000 +#define JADE_GDC_PHYS_DISP_BASE 0xf1fd0000 +#define JADE_CCNT_PHYS_BASE 0xfff42000 +#define JADE_CAN0_PHYS_BASE 0xfff54000 +#define JADE_CAN1_PHYS_BASE 0xfff55000 +#define JADE_I2C0_PHYS_BASE 0xfff56000 +#define JADE_I2C1_PHYS_BASE 0xfff57000 +#define JADE_EHCI_PHYS_BASE 0xfff80000 +#define JADE_OHCI_PHYS_BASE 0xfff81000 +#define JADE_IRC1_PHYS_BASE 0xfffb0000 +#define JADE_TIMER_PHYS_BASE 0xfffe0000 +#define JADE_UART0_PHYS_BASE 0xfffe1000 +#define JADE_UART1_PHYS_BASE 0xfffe2000 +#define JADE_IRCE_PHYS_BASE 0xfffe4000 +#define JADE_CRG_PHYS_BASE 0xfffe7000 +#define JADE_IRC0_PHYS_BASE 0xfffe8000 +#define JADE_GPIO_PHYS_BASE 0xfffe9000
please align them
+/* DRAMC_DRIC DRAM Controller Mode Register */
+/*
- REGISTER ADDRESS DEFINITION FOR DRAMC PERIPHERAL
- */
+#define JREGC_DRAMC_DRIC ((JREG *) 0xF3000000)
please remove the JREG everywhere as no need when use proper accessor
Best Regards, J.