
Hi Bin,
On 8 December 2015 at 06:24, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Tue, Dec 1, 2015 at 12:11 PM, Simon Glass sjg@chromium.org wrote:
At present this SPI driver works by searching the PCI buses for its peripheral. It also uses the legacy PCI API.
In addition the driver has code to determine the type of Intel PCH that is used (version 7 or version 9). Now that we have proper PCH drivers we can use those to obtain the information we need.
While the device tree has a node for the SPI peripheral it is not in the right place. It should be on the PCI bus as a sub-peripheral of the LPC device.
Update the device tree files to show the SPI controller within the PCH, so that PCI access works as expected.
Signed-off-by: Simon Glass sjg@chromium.org
arch/x86/cpu/irq.c | 7 +- arch/x86/cpu/ivybridge/bd82x6x.c | 11 +++ arch/x86/dts/bayleybay.dts | 160 +++++++++++++++++++----------------- arch/x86/dts/broadwell_som-6896.dts | 23 ++++-- arch/x86/dts/chromebook_link.dts | 3 +- arch/x86/dts/chromebox_panther.dts | 33 ++++---- arch/x86/dts/crownbay.dts | 150 +++++++++++++++++---------------- arch/x86/dts/galileo.dts | 98 +++++++++++----------- arch/x86/dts/minnowmax.dts | 158 ++++++++++++++++++----------------- arch/x86/dts/qemu-x86_i440fx.dts | 26 +++--- arch/x86/dts/qemu-x86_q35.dts | 38 +++++---- drivers/spi/ich.c | 115 ++++++-------------------- 12 files changed, 409 insertions(+), 413 deletions(-)
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c index 35b29f6..205405b 100644 --- a/arch/x86/cpu/irq.c +++ b/arch/x86/cpu/irq.c @@ -97,6 +97,7 @@ static int create_pirq_routing_table(void) struct irq_routing_table *rt; struct irq_info *slot, *slot_base; int irq_entries = 0;
int parent; int i; int ret;
@@ -106,7 +107,11 @@ static int create_pirq_routing_table(void) return -EINVAL; }
ret = fdtdec_get_pci_addr(blob, node, FDT_PCI_SPACE_CONFIG,
/* TODO(sjg@chromium.org): Drop this when PIRQ is a driver */
parent = fdt_parent_offset(blob, node);
if (parent < 0)
return -EINVAL;
ret = fdtdec_get_pci_addr(blob, parent, FDT_PCI_SPACE_CONFIG, "reg", &addr); if (ret) return ret;
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c index 434dfd6..abd59da 100644 --- a/arch/x86/cpu/ivybridge/bd82x6x.c +++ b/arch/x86/cpu/ivybridge/bd82x6x.c @@ -9,6 +9,7 @@ #include <errno.h> #include <fdtdec.h> #include <malloc.h> +#include <pch.h> #include <asm/lapic.h> #include <asm/pci.h> #include <asm/arch/bd82x6x.h> @@ -116,6 +117,15 @@ int bd82x6x_init(void)
Should this bd82x6x_init() be moved to init op of the pch driver?
That's a later patch.
return 0;
[snip]
Re using get_sbase() properly, I'll send a v2 patch and see what you think.
Regards, Simon