Hi Dave and Kim,
Freescale support got back to me regarding the BCSR corruption error. They determined there was a bug in the v1.2 BCSR code, and now have a v1.3.
For anyone else with an MDS board, if you want to update your BCSR, submit a SR to Freescale and ask for the v1.3 EEPROM file, or ask me and I'll send the file.
I didn't have any Xilinx FPGA boards, so didn't have any programming cables. So I programmed an Altera FPGA board to act as a Xilinx Parallel Cable III (the web has the schematic), and downloaded the old version of the Xilinx ISE 9.2i tools, since they has support for that cable. I used the iMPACT tool to detect the devices in the JTAG chain (EEPROM and Spartan) and then used it to program the EEPROM.
The BCSR version register reads back as v1.3.
The erroneous over-write of the BCSR[0] register no longer occurs.
Cheers, Dave