From: Ofer Heifetz oferh@marvell.com
The initial buffer is used for the initial commands used to detect a flash device (STATUS, READID and PARAM).
ONFI param page is 256 bytes, and there are three redundant copies to be read. JEDEC param page is 512 bytes, and there are also three redundant copies to be read. Hence this buffer should be at least 512 x 3. This commits rounds the buffer size to 2048.
[ Linux commit c16340973fcb6461474a9f811f7f3ff2f946b24c ]
Cc: Ezequiel Garcia <ezequiel at vanguardiasur.com.ar> Signed-off-by: Chris Packham <judge.packham at gmail.com> Reviewed-by: Ofer Heifetz oferh@marvell.com Tested-by: Ofer Heifetz oferh@marvell.com --- drivers/mtd/nand/pxa3xx_nand.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index a3ca337..c4505f1 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -29,10 +29,13 @@ DECLARE_GLOBAL_DATA_PTR;
/* * Define a buffer size for the initial command that detects the flash device: - * STATUS, READID and PARAM. The largest of these is the PARAM command, - * needing 256 bytes. + * STATUS, READID and PARAM. + * ONFI param page is 256 bytes, and there are three redundant copies + * to be read. JEDEC param page is 512 bytes, and there are also three + * redundant copies to be read. + * Hence this buffer should be at least 512 x 3. Let's pick 2048. */ -#define INIT_BUFFER_SIZE 256 +#define INIT_BUFFER_SIZE 2048
/* registers and bit definitions */ #define NDCR (0x00) /* Control register */ @@ -843,14 +846,14 @@ static int prepare_set_command(struct pxa3xx_nand_info *info, int command, break;
case NAND_CMD_PARAM: - info->buf_count = 256; + info->buf_count = INIT_BUFFER_SIZE; info->ndcb0 |= NDCB0_CMD_TYPE(0) | NDCB0_ADDR_CYC(1) | NDCB0_LEN_OVRD | command; info->ndcb1 = (column & 0xFF); - info->ndcb3 = 256; - info->data_size = 256; + info->ndcb3 = INIT_BUFFER_SIZE; + info->data_size = INIT_BUFFER_SIZE; break;
case NAND_CMD_READID: