-----Original Message----- From: york sun Sent: Tuesday, February 07, 2017 10:38 PM To: Priyanka Jain priyanka.jain@nxp.com; u-boot@lists.denx.de Cc: Arpit Goel arpit.goel@nxp.com Subject: Re: [PATCH 2/3] armv8: fsl-lsch3: Update VID support
On 01/29/2017 11:21 PM, Priyanka Jain wrote:
-----Original Message----- From: york sun Sent: Friday, January 27, 2017 11:13 PM To: Priyanka Jain priyanka.jain@nxp.com; u-boot@lists.denx.de Cc: Arpit Goel arpit.goel@nxp.com Subject: Re: [PATCH 2/3] armv8: fsl-lsch3: Update VID support
On 01/18/2017 09:43 PM, Priyanka Jain wrote:
VID support in NXP layerscape Chassis-3 (lsch3) compilant SoCs like LS2088A, LS2080A differs from existing logic. -VDD voltage array is different -Registers are different -VDD calculation logic is different
Add new function adjust_vdd() for LSCH3 compliant SoCs
Signed-off-by: Priyanka Jain priyanka.jain@nxp.com Signed-off-by: Arpit Goel arpit.goel@nxp.com
.../include/asm/arch-fsl-layerscape/immap_lsch3.h | 4 +- board/freescale/common/vid.c | 174 ++++++++++++++++++-- 2 files changed, 164 insertions(+), 14 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 38a6d03..fc4d33b 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -187,9 +187,9 @@ struct ccsr_gur { u32 gpporcr3; u32 gpporcr4; u8 res_030[0x60-0x30]; -#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 25 +#define FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT 2 #define FSL_CHASSIS3_DCFG_FUSESR_VID_MASK 0x1F -#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 20 +#define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT 7 #define FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK 0x1F
Priyanka,
You changed the fuse register offset and fuse position in this and previous patch of this set. What's going on? I presume you have verified it on
LS2080ARDB.
How did it work before? Do we have two fuse status registers?
York
York,
These code changes are valid for both LS2080A and LS2088A. VID was not working before on LS2080A also.
I have to ask, does VID work now with this change set? Have you verified on both RDB and QDS? How about other SoCs in LSCH3 family?
York
We have verified VID support on LS2080AQDS, LS2080ARDB, LS2088AQDS, LS2080ARDB (all SoCs in upstream for which LSCH3 flag is applicable)
Priyanka