All rockchip SoCs can use ARM arch timer, let's enable it in common header file
Signed-off-by: Kever Yang kever.yang@rock-chips.com ---
include/configs/rk3368_common.h | 2 -- include/configs/rk3399_common.h | 2 -- include/configs/rockchip-common.h | 4 ++++ 3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 10f643f..a7fe4ca 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -22,8 +22,6 @@ #define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SKIP_LOWLEVEL_INIT
-#define COUNTER_FREQUENCY 24000000 - #define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index d700bf2..fe8c675 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -17,8 +17,6 @@ #define CONFIG_SPL_SPI_LOAD #endif
-#define COUNTER_FREQUENCY 24000000 - #define CONFIG_SYS_NS16550_MEM32
#define CONFIG_SYS_INIT_SP_ADDR 0x00300000 diff --git a/include/configs/rockchip-common.h b/include/configs/rockchip-common.h index 26d41b5..24651ce 100644 --- a/include/configs/rockchip-common.h +++ b/include/configs/rockchip-common.h @@ -8,6 +8,10 @@ #define _ROCKCHIP_COMMON_H_ #include <linux/sizes.h>
+#define COUNTER_FREQUENCY 24000000 +#define CONFIG_SYS_ARCH_TIMER +#define CONFIG_SYS_HZ_CLOCK 24000000 + #ifndef CONFIG_SPL_BUILD
/* First try to boot from SD (index 0), then eMMC (index 1) */