Hello Bo,
Am 30.10.2013 10:15, schrieb Bo Shen:
Enable SPL support which can load u-boot from SD card in FAT format.
Signed-off-by: Bo Shenvoice.shen@atmel.com
arch/arm/cpu/armv7/Makefile | 2 +- arch/arm/cpu/armv7/at91/u-boot-spl.lds | 50 +++++++++++++ arch/arm/include/asm/arch-at91/spl.h | 17 +++++ board/atmel/sama5d3xek/sama5d3xek.c | 123 ++++++++++++++++++++++++++++++++ include/configs/sama5d3xek.h | 37 ++++++++++ 5 files changed, 228 insertions(+), 1 deletion(-) create mode 100644 arch/arm/cpu/armv7/at91/u-boot-spl.lds create mode 100644 arch/arm/include/asm/arch-at91/spl.h
[...]
diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c index 7fa3ae7..4a5aea3 100644 --- a/board/atmel/sama5d3xek/sama5d3xek.c +++ b/board/atmel/sama5d3xek/sama5d3xek.c @@ -20,6 +20,9 @@ #include<micrel.h> #include<net.h> #include<netdev.h> +#include<spl.h> +#include<asm/arch/atmel_mpddrc.h> +#include<asm/arch/at91_wdt.h>
#ifdef CONFIG_USB_GADGET_ATMEL_USBA #include<asm/arch/atmel_usba_udc.h> @@ -293,3 +296,123 @@ void spi_cs_deactivate(struct spi_slave *slave) } } #endif /* CONFIG_ATMEL_SPI */
+/* NAND SPL */ +#ifdef CONFIG_SPL_BUILD +void spl_board_init(void) +{
- sama5d3xek_mci_hw_init();
+}
+u32 spl_boot_device(void) +{
- return BOOT_DEVICE_MMC1;
+}
+u32 spl_boot_mode(void) +{
- switch (spl_boot_device()) {
- case BOOT_DEVICE_MMC1:
return MMCSD_MODE_FAT;break;- default:
hang();- }
+}
+void ddr2_conf(struct atmel_mpddr *ddr2) +{
- ddr2->mdr = (ATMEL_MPDDRC_MDR_DBW_32BITS | ATMEL_MPDDRC_MDR_DDR2_SDRAM);
- ddr2->cr = (ATMEL_MPDDRC_CR_NC_COL_10 |
ATMEL_MPDDRC_CR_NR_ROW_14 |ATMEL_MPDDRC_CR_CAS_3 |ATMEL_MPDDRC_CR_EN_ENRDM |ATMEL_MPDDRC_CR_NB_8BANKS |ATMEL_MPDDRC_CR_DIS_NDQS |ATMEL_MPDDRC_CR_DECOD_INTERLEAVED |ATMEL_MPDDRC_CR_UNAL_SUPPORTED);- ddr2->rtr = 0x411;
- ddr2->tp0r = (6<< ATMEL_MPDDRC_TP0R_TRAS_OFFSET |
2<< ATMEL_MPDDRC_TP0R_TRCD_OFFSET |2<< ATMEL_MPDDRC_TP0R_TWR_OFFSET |8<< ATMEL_MPDDRC_TP0R_TRC_OFFSET |2<< ATMEL_MPDDRC_TP0R_TRP_OFFSET |2<< ATMEL_MPDDRC_TP0R_TRRD_OFFSET |2<< ATMEL_MPDDRC_TP0R_TWTR_OFFSET |2<< ATMEL_MPDDRC_TP0R_TMRD_OFFSET);- ddr2->tp1r = (2<< ATMEL_MPDDRC_TP1R_TXP_OFFSET |
200<< ATMEL_MPDDRC_TP1R_TXSRD_OFFSET |28<< ATMEL_MPDDRC_TP1R_TXSNR_OFFSET |26<< ATMEL_MPDDRC_TP1R_TRFC_OFFSET);- ddr2->tp2r = (7<< ATMEL_MPDDRC_TP2R_TFAW_OFFSET |
2<< ATMEL_MPDDRC_TP2R_TRTP_OFFSET |2<< ATMEL_MPDDRC_TP2R_TRPA_OFFSET |7<< ATMEL_MPDDRC_TP2R_TXARDS_OFFSET |8<< ATMEL_MPDDRC_TP2R_TXARD_OFFSET);+}
+void mem_init(void) +{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- struct atmel_mpddr ddr2;
- ddr2_conf(&ddr2);
- /* enable MPDDR clock */
- at91_periph_clk_enable(ATMEL_ID_MPDDRC);
- writel(0x4,&pmc->scer);
- /* DDRAM2 Controller initialize */
- ddr2_init(ATMEL_BASE_DDRCS,&ddr2);
+}
+static void at91_disable_wdt(void) +{
- struct at91_wdt *wdt = (struct at91_wdt *)ATMEL_BASE_WDT;
- writel(AT91_WDT_MR_WDDIS,&wdt->mr);
+}
+static void sama5d3xek_plla_init(void) +{
- struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
- u32 tmp;
- tmp = AT91_PMC_PLLAR_29 |
AT91_PMC_PLLXR_PLLCOUNT(0x3f) |AT91_PMC_PLLXR_MUL(43) |AT91_PMC_PLLXR_DIV(1);- at91_plla_init(tmp, 10000);
- writel(0x3<< 8,&pmc->pllicpr);
+}
+void s_init(void) +{
- u32 tmp;
- /* disable watchdog */
- at91_disable_wdt();
- /* PMC configuration */
- sama5d3xek_plla_init();
- tmp = AT91_PMC_MCKR_MDIV_4 |
AT91_PMC_MCKR_CSS_PLLA;- at91_mck_init(tmp, 10000);
- at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
- timer_init();
- board_early_init_f();
- preloader_console_init();
- mem_init();
+} +#endif
All this functions could be moved to a common file, I vote for:
arch/arm/cpu/arm926ejs/at91/spl.c
What do you think?
bye, Heiko