7 Dec
2018
7 Dec
'18
9:34 p.m.
On Mon, Dec 03, 2018 at 10:52:51AM +0100, Patrice Chotard wrote:
In some STM32 SoC packages, GPIO bank has not always 16 gpios. Several cases can occur, gpio hole can be located at the beginning, middle or end of the gpio bank or a combination of these 3 configurations.
For that, gpio bindings offer the gpio-ranges DT property which described the gpio bank mapping.
Signed-off-by: Patrice Chotard patrice.chotard@st.com
Applied to u-boot/master, thanks!
--
Tom