This is a combination of a single patch and a 4-part series sent previously [1,2], this time with Jagan on Cc.
Patch 1 is a convenient pseudo-gpio driver for controlling a single output signal on mpc830x. Since it's (usually) used as a chip select, representing it as a gpio (without the gp or i) makes it simple to use in device tree.
The remaining four fix bugs in the mpc8xxx_spi driver, most importantly patch 4. Without it, reads and writes of certain lengths from spi-nor fails, and stuff at physical address 0x0 gets overwritten even if no input buffer is supplied (e.g. when sending a command).
Tested on an mpc8309-derived board. It would be nice if someone with access to the gazerbeam board can test that this doesn't break that - in particular, the "only do transfers that are multiple of 8 bits" part.
[1] https://patchwork.ozlabs.org/patch/1219513/ [2] https://patchwork.ozlabs.org/cover/1218170/
Klaus H. Sorensen (1): gpio/mpc83xx_spisel_boot.c: gpio driver for SPISEL_BOOT signal
Rasmus Villemoes (4): gazerbeam: add clocks property to SPI node mpc8xxx_spi: put max_cs to use mpc8xxx_spi: always use 8-bit characters, don't read or write garbage mpc8xxx_spi: implement real ->set_speed
arch/powerpc/dts/gdsys/mpc8308.dtsi | 7 + .../gpio/fsl,mpc83xx-spisel-boot.txt | 22 +++ drivers/gpio/Kconfig | 8 + drivers/gpio/Makefile | 1 + drivers/gpio/mpc83xx_spisel_boot.c | 148 ++++++++++++++++++ drivers/spi/mpc8xxx_spi.c | 141 ++++++++++------- 6 files changed, 267 insertions(+), 60 deletions(-) create mode 100644 doc/device-tree-bindings/gpio/fsl,mpc83xx-spisel-boot.txt create mode 100644 drivers/gpio/mpc83xx_spisel_boot.c