On Tue, Apr 1, 2008 at 8:33 AM, Andre Schwarz
<andre.schwarz@matrix-vision.de> wrote:
Tor,
after investigating the tsec code I'm wondering how your PHY works in
RGMII mode ...
I think that there are some things missing, e.g. taking RGMII into
account during tsec_init.
/* Init ECNTRL */
regs->ecntrl = ECNTRL_INIT_SETTINGS;
If you look carefully, you'll notice that ecntrl's RPM bit is
read-only. Those bits are configured by POR pin strappings.
sorry, my documentation (MPC8349EARM rev.1) declares this register
read-write.