This patch added Kconfig support for CONFIG_ZYNQ_SDHCI1 and enabled it in defconfig.
Signed-off-by: Vipul Kumar vipulk@xilinx.com Signed-off-by: Siva Durga Prasad Paladugu sivadur@xilinx.com --- - Changes in v2: - Added depends on MMC_SDHCI_ZYNQ - Branch: u-boot-microblaze/kconfig --- arch/arm/cpu/armv8/zynqmp/Kconfig | 6 ++++++ configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig | 1 + configs/xilinx_zynqmp_zcu102_rev1_0_defconfig | 1 + configs/xilinx_zynqmp_zcu102_revA_defconfig | 1 + configs/xilinx_zynqmp_zcu102_revB_defconfig | 1 + include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h | 1 - include/configs/xilinx_zynqmp_zcu102.h | 1 - 7 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig index 6eddea7..a903344 100644 --- a/arch/arm/cpu/armv8/zynqmp/Kconfig +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig @@ -95,6 +95,12 @@ config ZYNQ_SDHCI0 help Enable the SDHCI0 controller for Xilinx ZynqMP.
+config ZYNQ_SDHCI1 + bool "Xilinx SDHCI1 controller" + depends on MMC_SDHCI_ZYNQ + help + Enable the SDHCI1 controller for Xilinx ZynqMP. + config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED bool "Overwrite SPL bootmode" depends on SPL diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 05d98c0..be0e37f 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm015 dc1" CONFIG_ZYNQMP_USB=y CONFIG_ZYNQ_SDHCI0=y +CONFIG_ZYNQ_SDHCI1=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1" CONFIG_DEBUG_UART=y CONFIG_AHCI=y diff --git a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig index 1df5b0b..67d3fa6 100644 --- a/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig +++ b/configs/xilinx_zynqmp_zcu102_rev1_0_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 rev1.0" CONFIG_ZYNQMP_USB=y +CONFIG_ZYNQ_SDHCI1=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-rev1.0" CONFIG_DEBUG_UART=y CONFIG_AHCI=y diff --git a/configs/xilinx_zynqmp_zcu102_revA_defconfig b/configs/xilinx_zynqmp_zcu102_revA_defconfig index c8a8362..76f7993 100644 --- a/configs/xilinx_zynqmp_zcu102_revA_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revA_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 revA" CONFIG_ZYNQMP_USB=y +CONFIG_ZYNQ_SDHCI1=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revA" CONFIG_DEBUG_UART=y CONFIG_AHCI=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index 8f85b5f..0624034 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102 revB" CONFIG_ZYNQMP_USB=y +CONFIG_ZYNQ_SDHCI1=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB" CONFIG_DEBUG_UART=y CONFIG_AHCI=y diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h index 7bcefad..a415569 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h @@ -10,7 +10,6 @@ #ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H #define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
-#define CONFIG_ZYNQ_SDHCI1 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR}
#include <configs/xilinx_zynqmp.h> diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h index 27d9d6a..097ac49 100644 --- a/include/configs/xilinx_zynqmp_zcu102.h +++ b/include/configs/xilinx_zynqmp_zcu102.h @@ -10,7 +10,6 @@ #ifndef __CONFIG_ZYNQMP_ZCU102_H #define __CONFIG_ZYNQMP_ZCU102_H
-#define CONFIG_ZYNQ_SDHCI1 #define CONFIG_SYS_I2C_MAX_HOPS 1 #define CONFIG_SYS_NUM_I2C_BUSES 18 #define CONFIG_SYS_I2C_BUSES { \ -- 2.7.4
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