On Wed, Mar 7, 2012 at 11:19 AM, Menon, Nishanth nm@ti.com wrote:
On Wed, Mar 7, 2012 at 11:04, Tom Rini trini@ti.com wrote:
On Thu, Mar 01, 2012 at 08:08:30PM +0530, R Sricharan wrote:
The nominal opp vdd values as recommended for ES1.0 silicon is set for mpu, core, mm domains using palmas.
OK, this creates some trivial conflicts with http://patchwork.ozlabs.org/patch/144137/ but also raises a functional problem / question. Is this patch also changing the order to match what Nishanth did or does this patch also need that functional change done (and a v3) ? Thanks!
Glancing at this patch, I see that scale sequence is still mpu, core, MM - which is what my sequence fixes. will be nice to have the sequence fixed followed by cleanup/update to retain the sequence appropriately.
- /* Palmas settings */
- volt = VDD_MPU;
- do_scale_vcore(SMPS_REG_ADDR_12_MPU, volt);
- /* VCORE 1 - for vdd_core */
- volt = 1000;
- do_scale_vcore(SMPS_REG_ADDR_VCORE1, volt);
- volt = VDD_MM;
- do_scale_vcore(SMPS_REG_ADDR_45_IVA, volt);
- /* VCORE 2 - for vdd_MM */
- volt = 1125;
- do_scale_vcore(SMPS_REG_ADDR_VCORE2, volt);
- volt = VDD_CORE;
- do_scale_vcore(SMPS_REG_ADDR_8_CORE, volt);
I think what might be easiest all around is to drop Nishanth's 4/4 and have patch 5 here correct the order as well, crediting Nishanth for the fix. Alternatively, respin the series, depending on Nishanth's series being applied. Thanks.