Single configuration is working fine and no issue to enable it.
Signed-off-by: Michal Simek michal.simek@xilinx.com ---
arch/arm/dts/zynq-zc702.dts | 8 ++++++++ arch/arm/dts/zynq-zc706.dts | 8 ++++++++ arch/arm/dts/zynq-zc770-xm010.dts | 8 ++++++++ arch/arm/dts/zynq-zc770-xm013.dts | 8 ++++++++ 4 files changed, 32 insertions(+)
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index 57a47409b915..f2e05a55b958 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -409,6 +409,14 @@ &qspi { u-boot,dm-pre-reloc; status = "okay"; + num-cs = <1>; + flash@0 { + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + }; };
&sdhci0 { diff --git a/arch/arm/dts/zynq-zc706.dts b/arch/arm/dts/zynq-zc706.dts index 87308c0333d3..cb919e40533e 100644 --- a/arch/arm/dts/zynq-zc706.dts +++ b/arch/arm/dts/zynq-zc706.dts @@ -307,6 +307,14 @@ &qspi { u-boot,dm-pre-reloc; status = "okay"; + num-cs = <1>; + flash@0 { + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + }; };
&sdhci0 { diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index c547d7921d9c..002ff9f7f489 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -62,6 +62,14 @@
&qspi { status = "okay"; + num-cs = <1>; + flash@0 { + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + }; };
&sdhci0 { diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts index 7218ee3ad8ef..455c8a961057 100644 --- a/arch/arm/dts/zynq-zc770-xm013.dts +++ b/arch/arm/dts/zynq-zc770-xm013.dts @@ -61,6 +61,14 @@
&qspi { status = "okay"; + num-cs = <1>; + flash@0 { + compatible = "n25q128a11", "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <50000000>; + }; };
&spi0 {