On 09/27/2012 05:19:23 PM, Lucas Stach wrote:
Am Donnerstag, den 27.09.2012, 17:13 -0500 schrieb Scott Wood:
On 09/27/2012 05:08:03 PM, Lucas Stach wrote:
Am Donnerstag, den 27.09.2012, 16:53 -0500 schrieb Scott Wood:
On 09/27/2012 04:49:31 PM, Lucas Stach wrote:
As found on the Colibri T20 engineering sample board.
Signed-off-by: Lucas Stach dev@lynxeye.de
drivers/mtd/nand/nand_ids.c | 1 + 1 Datei geändert, 1 Zeile hinzugefügt(+)
diff --git a/drivers/mtd/nand/nand_ids.c
b/drivers/mtd/nand/nand_ids.c
index 3953549..ae300fe 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -105,6 +105,7 @@ const struct nand_flash_dev
nand_flash_ids[]
= {
{"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0,
LP_OPTIONS16},
/* 8 Gigabit */
- {"NAND 1GiB 3,3V 8-bit", 0x38, 0, 1024, 0,
LP_OPTIONS},
{"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0,
LP_OPTIONS},
{"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0,
LP_OPTIONS},
{"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0,
LP_OPTIONS16},
-- 1.7.11.4
Does this chip support ONFI? If so, we don't use the ID table.
I just rechecked, the datasheet claims the chip supports ONFI
2.0, but
it does not get detected by the u-boot NAND code without the
entry in
the id table. CONFIG_SYS_NAND_ONFI_DETECTION is set.
Could you debug it? Could there be a problem in the NAND controller (or the driver)?
Haven't done much in tracking this down much further. Could quite possible be a bug in the Tegra nand driver, this driver isn't in tree for a long time and it seems no Tegra board so far tried using ONFI.
I don't see the Tegra READID code using column, which is a problem. Hopefully this is a driver limitation and not hardware, unlike i.MX.
-Scott