
On Tuesday 17 July 2018 12:32 PM, Felix Brack wrote:
This patch adds a new Kconfig variable that allows setting the register offset shift value for the ns16550 driver to some other value then 0 if not defined by the DT. All credit for this patch goes to Lokesh Vutla as it was his idea.
The motivation for writing this patch originates in the effort of synchronizing U-Boot DT to Linux DT for am33xx SOCs. The current am33xx.dtsi file from U-Boot defines the <reg-shift> property for all UART nodes. The actual (4.18+) am33xx.dtsi file from Linux does not define <reg-shift> anymore. To prevent (probably difficult) changes in many .dts and .dtsi files once the synchronization is done, one can use this new variable. For the pdu001 board, for example, SYS_NS16550_REG_SHIFT is set to 2; no need to clutter U-Boot and board specific dts files with <reg-shift> properties.
Signed-off-by: Felix Brack fb@ltec.ch
Changes in v2:
- clarify variable usage
- set default value to 2 for AM33XX SoC
drivers/serial/Kconfig | 15 +++++++++++++++ drivers/serial/ns16550.c | 3 ++- 2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 766e5ce..7eb3c6f 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -530,6 +530,21 @@ config SYS_NS16550 be used. It can be a constant or a function to get clock, eg, get_serial_clock().
+config SYS_NS16550_REG_SHIFT
- int "Amount of bits to shift register offsets left"
- default 2 if AM33XX
Can you make it default for ARCH_OMAP2PLUS?
Thanks and regards, Lokesh
- default 0
- depends on SYS_NS16550
- help
Use this to specify the amount of bits to shift device register
offsets to the left. The resulting register offset is calculate as
follows: "reg offset" << SYS_NS16550_REG_SHIFT. If, for example,
the device register offsets are 0x00, 0x04, 0x08, 0x0C and so forth
than set this to 2.
In case of AM33XX SoC the default value is 2, 0 otherwise. Note
that a <reg-shift> property defined in a UART node of the device
tree will always take precedence.
config INTEL_MID_SERIAL bool "Intel MID platform UART support" depends on DM_SERIAL && OF_CONTROL diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 9c80090..9ff6dbe 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -442,7 +442,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) #endif
plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
- plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
plat->reg_shift = dev_read_u32_default(dev, "reg-shift",
CONFIG_SYS_NS16550_REG_SHIFT);
err = clk_get_by_index(dev, 0, &clk); if (!err) {