Hi
2009/6/23 Scott Wood scottwood@freescale.com:
On Mon, Jun 08, 2009 at 04:12:48AM +0400, Ilya Yanok wrote:
Driver for NFC NAND controller found on Freescale's MX2 and MX3 processors. Ported from Linux. Tested only with i.MX27 but should works with other MX2 and MX3 processors too.
Signed-off-by: Ilya Yanok yanok@emcraft.com +static u_char mxc_nand_read_byte(struct mtd_info *mtd) +{
- struct nand_chip *nand_chip = mtd->priv;
- struct mxc_nand_host *host = nand_chip->priv;
- uint8_t ret = 0;
- uint16_t col, rd_word;
- uint16_t __iomem *main_buf =
- (uint16_t __iomem *)host->regs->main_area0;
- uint16_t __iomem *spare_buf =
- (uint16_t __iomem *)host->regs->spare_area0;
According to Magnus Lilja, "the nand flash controller can only handle 32 bit read/write operations, any other size will cause an abort (or something like that)". But now we're accessing it as 16-bit?
I'm not sure if the controller allows 16 bit accesses or not, don't remember if I've tried that. 8 bit accesses don't work. Also, I don't know if it's the controller itself that can't cope with 8 bit accesses or if it's the bus interface to the NFC block in i.MX31.
Regards, Magnus