[U-Boot] [PATCH] x86: turn off cache: set control register properly

Bits should be ORed when they are supposed to be added together

Cc: Graeme Russ graeme.russ@gmail.com Signed-off-by: Ondrej Kupka ondra.cap@gmail.com --- arch/x86/cpu/start16.S | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/cpu/start16.S b/arch/x86/cpu/start16.S index 3d3017a..9dabff2 100644 --- a/arch/x86/cpu/start16.S +++ b/arch/x86/cpu/start16.S @@ -50,7 +50,7 @@ board_init16_ret:

/* Turn of cache (this might require a 486-class CPU) */ movl %cr0, %eax - orl $(X86_CR0_NW & X86_CR0_CD), %eax + orl $(X86_CR0_NW | X86_CR0_CD), %eax movl %eax, %cr0 wbinvd