This board has not been converted to CONFIG_DM_BLK by the deadline. Remove it.
Signed-off-by: Simon Glass sjg@chromium.org ---
arch/arm/mach-omap2/Kconfig | 1 - board/ti/am43xx/Kconfig | 17 - board/ti/am43xx/MAINTAINERS | 11 - board/ti/am43xx/Makefile | 11 - board/ti/am43xx/board.c | 957 ---------------------- board/ti/am43xx/board.h | 62 -- board/ti/am43xx/mux.c | 153 ---- configs/am43xx_evm_defconfig | 61 -- configs/am43xx_evm_ethboot_defconfig | 65 -- configs/am43xx_evm_qspiboot_defconfig | 63 -- configs/am43xx_evm_rtconly_defconfig | 62 -- configs/am43xx_evm_usbhost_boot_defconfig | 75 -- configs/am43xx_hs_evm_defconfig | 72 -- include/configs/am43xx_evm.h | 292 ------- 14 files changed, 1902 deletions(-) delete mode 100644 board/ti/am43xx/Kconfig delete mode 100644 board/ti/am43xx/MAINTAINERS delete mode 100644 board/ti/am43xx/Makefile delete mode 100644 board/ti/am43xx/board.c delete mode 100644 board/ti/am43xx/board.h delete mode 100644 board/ti/am43xx/mux.c delete mode 100644 configs/am43xx_evm_defconfig delete mode 100644 configs/am43xx_evm_ethboot_defconfig delete mode 100644 configs/am43xx_evm_qspiboot_defconfig delete mode 100644 configs/am43xx_evm_rtconly_defconfig delete mode 100644 configs/am43xx_evm_usbhost_boot_defconfig delete mode 100644 configs/am43xx_hs_evm_defconfig delete mode 100644 include/configs/am43xx_evm.h
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 271250b82ce..5caf4bae6f8 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -182,7 +182,6 @@ source "board/siemens/pxm2/Kconfig" source "board/siemens/rut/Kconfig" source "board/ti/ti814x/Kconfig" source "board/ti/ti816x/Kconfig" -source "board/ti/am43xx/Kconfig"
config SPL_LDSCRIPT default "arch/arm/mach-omap2/u-boot-spl.lds" diff --git a/board/ti/am43xx/Kconfig b/board/ti/am43xx/Kconfig deleted file mode 100644 index 9cb80cc3f1d..00000000000 --- a/board/ti/am43xx/Kconfig +++ /dev/null @@ -1,17 +0,0 @@ -if TARGET_AM43XX_EVM - -config SYS_BOARD - default "am43xx" - -config SYS_VENDOR - default "ti" - -config SYS_SOC - default "am33xx" - -config SYS_CONFIG_NAME - default "am43xx_evm" - -source "board/ti/common/Kconfig" - -endif diff --git a/board/ti/am43xx/MAINTAINERS b/board/ti/am43xx/MAINTAINERS deleted file mode 100644 index bf098064bda..00000000000 --- a/board/ti/am43xx/MAINTAINERS +++ /dev/null @@ -1,11 +0,0 @@ -AM43XX BOARD -M: Lokesh Vutla lokeshvutla@ti.com -S: Maintained -F: board/ti/am43xx/ -F: include/configs/am43xx_evm.h -F: configs/am43xx_evm_defconfig -F: configs/am43xx_evm_ethboot_defconfig -F: configs/am43xx_evm_qspiboot_defconfig -F: configs/am43xx_evm_usbhost_boot_defconfig -F: configs/am43xx_evm_rtconly_defconfig -F: configs/am43xx_hs_evm_defconfig diff --git a/board/ti/am43xx/Makefile b/board/ti/am43xx/Makefile deleted file mode 100644 index 60a11d8c04d..00000000000 --- a/board/ti/am43xx/Makefile +++ /dev/null @@ -1,11 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Makefile -# -# Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - -ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),) -obj-y := mux.o -endif - -obj-y += board.o diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c deleted file mode 100644 index 2a59b060351..00000000000 --- a/board/ti/am43xx/board.c +++ /dev/null @@ -1,957 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * board.c - * - * Board functions for TI AM43XX based boards - * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ - */ - -#include <common.h> -#include <environment.h> -#include <i2c.h> -#include <linux/errno.h> -#include <spl.h> -#include <usb.h> -#include <asm/omap_sec_common.h> -#include <asm/arch/clock.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/mux.h> -#include <asm/arch/ddr_defs.h> -#include <asm/arch/gpio.h> -#include <asm/emif.h> -#include <asm/omap_common.h> -#include "../common/board_detect.h" -#include "board.h" -#include <power/pmic.h> -#include <power/tps65218.h> -#include <power/tps62362.h> -#include <miiphy.h> -#include <cpsw.h> -#include <linux/usb/gadget.h> -#include <dwc3-uboot.h> -#include <dwc3-omap-uboot.h> -#include <ti-usb-phy-uboot.h> - -DECLARE_GLOBAL_DATA_PTR; - -static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; - -/* - * Read header information from EEPROM into global structure. - */ -#ifdef CONFIG_TI_I2C_BOARD_DETECT -void do_board_detect(void) -{ - if (ti_i2c_eeprom_am_get(CONFIG_EEPROM_BUS_ADDRESS, - CONFIG_EEPROM_CHIP_ADDRESS)) - printf("ti_i2c_eeprom_init failed\n"); -} -#endif - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - -const struct dpll_params dpll_mpu[NUM_CRYSTAL_FREQ][NUM_OPPS] = { - { /* 19.2 MHz */ - {125, 3, 2, -1, -1, -1, -1}, /* OPP 50 */ - {-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */ - {125, 3, 1, -1, -1, -1, -1}, /* OPP 100 */ - {150, 3, 1, -1, -1, -1, -1}, /* OPP 120 */ - {125, 2, 1, -1, -1, -1, -1}, /* OPP TB */ - {625, 11, 1, -1, -1, -1, -1} /* OPP NT */ - }, - { /* 24 MHz */ - {300, 23, 1, -1, -1, -1, -1}, /* OPP 50 */ - {-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */ - {600, 23, 1, -1, -1, -1, -1}, /* OPP 100 */ - {720, 23, 1, -1, -1, -1, -1}, /* OPP 120 */ - {800, 23, 1, -1, -1, -1, -1}, /* OPP TB */ - {1000, 23, 1, -1, -1, -1, -1} /* OPP NT */ - }, - { /* 25 MHz */ - {300, 24, 1, -1, -1, -1, -1}, /* OPP 50 */ - {-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */ - {600, 24, 1, -1, -1, -1, -1}, /* OPP 100 */ - {720, 24, 1, -1, -1, -1, -1}, /* OPP 120 */ - {800, 24, 1, -1, -1, -1, -1}, /* OPP TB */ - {1000, 24, 1, -1, -1, -1, -1} /* OPP NT */ - }, - { /* 26 MHz */ - {300, 25, 1, -1, -1, -1, -1}, /* OPP 50 */ - {-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */ - {600, 25, 1, -1, -1, -1, -1}, /* OPP 100 */ - {720, 25, 1, -1, -1, -1, -1}, /* OPP 120 */ - {800, 25, 1, -1, -1, -1, -1}, /* OPP TB */ - {1000, 25, 1, -1, -1, -1, -1} /* OPP NT */ - }, -}; - -const struct dpll_params dpll_core[NUM_CRYSTAL_FREQ] = { - {625, 11, -1, -1, 10, 8, 4}, /* 19.2 MHz */ - {1000, 23, -1, -1, 10, 8, 4}, /* 24 MHz */ - {1000, 24, -1, -1, 10, 8, 4}, /* 25 MHz */ - {1000, 25, -1, -1, 10, 8, 4} /* 26 MHz */ -}; - -const struct dpll_params dpll_per[NUM_CRYSTAL_FREQ] = { - {400, 7, 5, -1, -1, -1, -1}, /* 19.2 MHz */ - {400, 9, 5, -1, -1, -1, -1}, /* 24 MHz */ - {384, 9, 5, -1, -1, -1, -1}, /* 25 MHz */ - {480, 12, 5, -1, -1, -1, -1} /* 26 MHz */ -}; - -const struct dpll_params epos_evm_dpll_ddr[NUM_CRYSTAL_FREQ] = { - {665, 47, 1, -1, 4, -1, -1}, /*19.2*/ - {133, 11, 1, -1, 4, -1, -1}, /* 24 MHz */ - {266, 24, 1, -1, 4, -1, -1}, /* 25 MHz */ - {133, 12, 1, -1, 4, -1, -1} /* 26 MHz */ -}; - -const struct dpll_params gp_evm_dpll_ddr = { - 50, 2, 1, -1, 2, -1, -1}; - -static const struct dpll_params idk_dpll_ddr = { - 400, 23, 1, -1, 2, -1, -1 -}; - -static const u32 ext_phy_ctrl_const_base_lpddr2[] = { - 0x00500050, - 0x00350035, - 0x00350035, - 0x00350035, - 0x00350035, - 0x00350035, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x00000000, - 0x40001000, - 0x08102040 -}; - -const struct ctrl_ioregs ioregs_lpddr2 = { - .cm0ioctl = LPDDR2_ADDRCTRL_IOCTRL_VALUE, - .cm1ioctl = LPDDR2_ADDRCTRL_WD0_IOCTRL_VALUE, - .cm2ioctl = LPDDR2_ADDRCTRL_WD1_IOCTRL_VALUE, - .dt0ioctl = LPDDR2_DATA0_IOCTRL_VALUE, - .dt1ioctl = LPDDR2_DATA0_IOCTRL_VALUE, - .dt2ioctrl = LPDDR2_DATA0_IOCTRL_VALUE, - .dt3ioctrl = LPDDR2_DATA0_IOCTRL_VALUE, - .emif_sdram_config_ext = 0x1, -}; - -const struct emif_regs emif_regs_lpddr2 = { - .sdram_config = 0x808012BA, - .ref_ctrl = 0x0000040D, - .sdram_tim1 = 0xEA86B411, - .sdram_tim2 = 0x103A094A, - .sdram_tim3 = 0x0F6BA37F, - .read_idle_ctrl = 0x00050000, - .zq_config = 0x50074BE4, - .temp_alert_config = 0x0, - .emif_rd_wr_lvl_rmp_win = 0x0, - .emif_rd_wr_lvl_rmp_ctl = 0x0, - .emif_rd_wr_lvl_ctl = 0x0, - .emif_ddr_phy_ctlr_1 = 0x0E284006, - .emif_rd_wr_exec_thresh = 0x80000405, - .emif_ddr_ext_phy_ctrl_1 = 0x04010040, - .emif_ddr_ext_phy_ctrl_2 = 0x00500050, - .emif_ddr_ext_phy_ctrl_3 = 0x00500050, - .emif_ddr_ext_phy_ctrl_4 = 0x00500050, - .emif_ddr_ext_phy_ctrl_5 = 0x00500050, - .emif_prio_class_serv_map = 0x80000001, - .emif_connect_id_serv_1_map = 0x80000094, - .emif_connect_id_serv_2_map = 0x00000000, - .emif_cos_config = 0x000FFFFF -}; - -const struct ctrl_ioregs ioregs_ddr3 = { - .cm0ioctl = DDR3_ADDRCTRL_IOCTRL_VALUE, - .cm1ioctl = DDR3_ADDRCTRL_WD0_IOCTRL_VALUE, - .cm2ioctl = DDR3_ADDRCTRL_WD1_IOCTRL_VALUE, - .dt0ioctl = DDR3_DATA0_IOCTRL_VALUE, - .dt1ioctl = DDR3_DATA0_IOCTRL_VALUE, - .dt2ioctrl = DDR3_DATA0_IOCTRL_VALUE, - .dt3ioctrl = DDR3_DATA0_IOCTRL_VALUE, - .emif_sdram_config_ext = 0xc163, -}; - -const struct emif_regs ddr3_emif_regs_400Mhz = { - .sdram_config = 0x638413B2, - .ref_ctrl = 0x00000C30, - .sdram_tim1 = 0xEAAAD4DB, - .sdram_tim2 = 0x266B7FDA, - .sdram_tim3 = 0x107F8678, - .read_idle_ctrl = 0x00050000, - .zq_config = 0x50074BE4, - .temp_alert_config = 0x0, - .emif_ddr_phy_ctlr_1 = 0x0E004008, - .emif_ddr_ext_phy_ctrl_1 = 0x08020080, - .emif_ddr_ext_phy_ctrl_2 = 0x00400040, - .emif_ddr_ext_phy_ctrl_3 = 0x00400040, - .emif_ddr_ext_phy_ctrl_4 = 0x00400040, - .emif_ddr_ext_phy_ctrl_5 = 0x00400040, - .emif_rd_wr_lvl_rmp_win = 0x0, - .emif_rd_wr_lvl_rmp_ctl = 0x0, - .emif_rd_wr_lvl_ctl = 0x0, - .emif_rd_wr_exec_thresh = 0x80000405, - .emif_prio_class_serv_map = 0x80000001, - .emif_connect_id_serv_1_map = 0x80000094, - .emif_connect_id_serv_2_map = 0x00000000, - .emif_cos_config = 0x000FFFFF -}; - -/* EMIF DDR3 Configurations are different for beta AM43X GP EVMs */ -const struct emif_regs ddr3_emif_regs_400Mhz_beta = { - .sdram_config = 0x638413B2, - .ref_ctrl = 0x00000C30, - .sdram_tim1 = 0xEAAAD4DB, - .sdram_tim2 = 0x266B7FDA, - .sdram_tim3 = 0x107F8678, - .read_idle_ctrl = 0x00050000, - .zq_config = 0x50074BE4, - .temp_alert_config = 0x0, - .emif_ddr_phy_ctlr_1 = 0x0E004008, - .emif_ddr_ext_phy_ctrl_1 = 0x08020080, - .emif_ddr_ext_phy_ctrl_2 = 0x00000065, - .emif_ddr_ext_phy_ctrl_3 = 0x00000091, - .emif_ddr_ext_phy_ctrl_4 = 0x000000B5, - .emif_ddr_ext_phy_ctrl_5 = 0x000000E5, - .emif_rd_wr_exec_thresh = 0x80000405, - .emif_prio_class_serv_map = 0x80000001, - .emif_connect_id_serv_1_map = 0x80000094, - .emif_connect_id_serv_2_map = 0x00000000, - .emif_cos_config = 0x000FFFFF -}; - -/* EMIF DDR3 Configurations are different for production AM43X GP EVMs */ -const struct emif_regs ddr3_emif_regs_400Mhz_production = { - .sdram_config = 0x638413B2, - .ref_ctrl = 0x00000C30, - .sdram_tim1 = 0xEAAAD4DB, - .sdram_tim2 = 0x266B7FDA, - .sdram_tim3 = 0x107F8678, - .read_idle_ctrl = 0x00050000, - .zq_config = 0x50074BE4, - .temp_alert_config = 0x0, - .emif_ddr_phy_ctlr_1 = 0x0E004008, - .emif_ddr_ext_phy_ctrl_1 = 0x08020080, - .emif_ddr_ext_phy_ctrl_2 = 0x00000066, - .emif_ddr_ext_phy_ctrl_3 = 0x00000091, - .emif_ddr_ext_phy_ctrl_4 = 0x000000B9, - .emif_ddr_ext_phy_ctrl_5 = 0x000000E6, - .emif_rd_wr_exec_thresh = 0x80000405, - .emif_prio_class_serv_map = 0x80000001, - .emif_connect_id_serv_1_map = 0x80000094, - .emif_connect_id_serv_2_map = 0x00000000, - .emif_cos_config = 0x000FFFFF -}; - -static const struct emif_regs ddr3_sk_emif_regs_400Mhz = { - .sdram_config = 0x638413b2, - .sdram_config2 = 0x00000000, - .ref_ctrl = 0x00000c30, - .sdram_tim1 = 0xeaaad4db, - .sdram_tim2 = 0x266b7fda, - .sdram_tim3 = 0x107f8678, - .read_idle_ctrl = 0x00050000, - .zq_config = 0x50074be4, - .temp_alert_config = 0x0, - .emif_ddr_phy_ctlr_1 = 0x0e084008, - .emif_ddr_ext_phy_ctrl_1 = 0x08020080, - .emif_ddr_ext_phy_ctrl_2 = 0x89, - .emif_ddr_ext_phy_ctrl_3 = 0x90, - .emif_ddr_ext_phy_ctrl_4 = 0x8e, - .emif_ddr_ext_phy_ctrl_5 = 0x8d, - .emif_rd_wr_lvl_rmp_win = 0x0, - .emif_rd_wr_lvl_rmp_ctl = 0x00000000, - .emif_rd_wr_lvl_ctl = 0x00000000, - .emif_rd_wr_exec_thresh = 0x80000000, - .emif_prio_class_serv_map = 0x80000001, - .emif_connect_id_serv_1_map = 0x80000094, - .emif_connect_id_serv_2_map = 0x00000000, - .emif_cos_config = 0x000FFFFF -}; - -static const struct emif_regs ddr3_idk_emif_regs_400Mhz = { - .sdram_config = 0x61a11b32, - .sdram_config2 = 0x00000000, - .ref_ctrl = 0x00000c30, - .sdram_tim1 = 0xeaaad4db, - .sdram_tim2 = 0x266b7fda, - .sdram_tim3 = 0x107f8678, - .read_idle_ctrl = 0x00050000, - .zq_config = 0x50074be4, - .temp_alert_config = 0x00000000, - .emif_ddr_phy_ctlr_1 = 0x00008009, - .emif_ddr_ext_phy_ctrl_1 = 0x08020080, - .emif_ddr_ext_phy_ctrl_2 = 0x00000040, - .emif_ddr_ext_phy_ctrl_3 = 0x0000003e, - .emif_ddr_ext_phy_ctrl_4 = 0x00000051, - .emif_ddr_ext_phy_ctrl_5 = 0x00000051, - .emif_rd_wr_lvl_rmp_win = 0x00000000, - .emif_rd_wr_lvl_rmp_ctl = 0x00000000, - .emif_rd_wr_lvl_ctl = 0x00000000, - .emif_rd_wr_exec_thresh = 0x00000405, - .emif_prio_class_serv_map = 0x00000000, - .emif_connect_id_serv_1_map = 0x00000000, - .emif_connect_id_serv_2_map = 0x00000000, - .emif_cos_config = 0x00ffffff -}; - -void emif_get_ext_phy_ctrl_const_regs(const u32 **regs, u32 *size) -{ - if (board_is_eposevm()) { - *regs = ext_phy_ctrl_const_base_lpddr2; - *size = ARRAY_SIZE(ext_phy_ctrl_const_base_lpddr2); - } - - return; -} - -const struct dpll_params *get_dpll_ddr_params(void) -{ - int ind = get_sys_clk_index(); - - if (board_is_eposevm()) - return &epos_evm_dpll_ddr[ind]; - else if (board_is_evm() || board_is_sk()) - return &gp_evm_dpll_ddr; - else if (board_is_idk()) - return &idk_dpll_ddr; - - printf(" Board '%s' not supported\n", board_ti_get_name()); - return NULL; -} - - -/* - * get_opp_offset: - * Returns the index for safest OPP of the device to boot. - * max_off: Index of the MAX OPP in DEV ATTRIBUTE register. - * min_off: Index of the MIN OPP in DEV ATTRIBUTE register. - * This data is read from dev_attribute register which is e-fused. - * A'1' in bit indicates OPP disabled and not available, a '0' indicates - * OPP available. Lowest OPP starts with min_off. So returning the - * bit with rightmost '0'. - */ -static int get_opp_offset(int max_off, int min_off) -{ - struct ctrl_stat *ctrl = (struct ctrl_stat *)CTRL_BASE; - int opp, offset, i; - - /* Bits 0:11 are defined to be the MPU_MAX_FREQ */ - opp = readl(&ctrl->dev_attr) & ~0xFFFFF000; - - for (i = max_off; i >= min_off; i--) { - offset = opp & (1 << i); - if (!offset) - return i; - } - - return min_off; -} - -const struct dpll_params *get_dpll_mpu_params(void) -{ - int opp = get_opp_offset(DEV_ATTR_MAX_OFFSET, DEV_ATTR_MIN_OFFSET); - u32 ind = get_sys_clk_index(); - - return &dpll_mpu[ind][opp]; -} - -const struct dpll_params *get_dpll_core_params(void) -{ - int ind = get_sys_clk_index(); - - return &dpll_core[ind]; -} - -const struct dpll_params *get_dpll_per_params(void) -{ - int ind = get_sys_clk_index(); - - return &dpll_per[ind]; -} - -void scale_vcores_generic(u32 m) -{ - int mpu_vdd, ddr_volt; - - if (i2c_probe(TPS65218_CHIP_PM)) - return; - - switch (m) { - case 1000: - mpu_vdd = TPS65218_DCDC_VOLT_SEL_1330MV; - break; - case 800: - mpu_vdd = TPS65218_DCDC_VOLT_SEL_1260MV; - break; - case 720: - mpu_vdd = TPS65218_DCDC_VOLT_SEL_1200MV; - break; - case 600: - mpu_vdd = TPS65218_DCDC_VOLT_SEL_1100MV; - break; - case 300: - mpu_vdd = TPS65218_DCDC_VOLT_SEL_0950MV; - break; - default: - puts("Unknown MPU clock, not scaling\n"); - return; - } - - /* Set DCDC1 (CORE) voltage to 1.1V */ - if (tps65218_voltage_update(TPS65218_DCDC1, - TPS65218_DCDC_VOLT_SEL_1100MV)) { - printf("%s failure\n", __func__); - return; - } - - /* Set DCDC2 (MPU) voltage */ - if (tps65218_voltage_update(TPS65218_DCDC2, mpu_vdd)) { - printf("%s failure\n", __func__); - return; - } - - if (board_is_eposevm()) - ddr_volt = TPS65218_DCDC3_VOLT_SEL_1200MV; - else - ddr_volt = TPS65218_DCDC3_VOLT_SEL_1350MV; - - /* Set DCDC3 (DDR) voltage */ - if (tps65218_voltage_update(TPS65218_DCDC3, ddr_volt)) { - printf("%s failure\n", __func__); - return; - } -} - -void scale_vcores_idk(u32 m) -{ - int mpu_vdd; - - if (i2c_probe(TPS62362_I2C_ADDR)) - return; - - switch (m) { - case 1000: - mpu_vdd = TPS62362_DCDC_VOLT_SEL_1330MV; - break; - case 800: - mpu_vdd = TPS62362_DCDC_VOLT_SEL_1260MV; - break; - case 720: - mpu_vdd = TPS62362_DCDC_VOLT_SEL_1200MV; - break; - case 600: - mpu_vdd = TPS62362_DCDC_VOLT_SEL_1100MV; - break; - case 300: - mpu_vdd = TPS62362_DCDC_VOLT_SEL_1330MV; - break; - default: - puts("Unknown MPU clock, not scaling\n"); - return; - } - - /* Set VDD_MPU voltage */ - if (tps62362_voltage_update(TPS62362_SET3, mpu_vdd)) { - printf("%s failure\n", __func__); - return; - } -} - -void gpi2c_init(void) -{ - /* When needed to be invoked prior to BSS initialization */ - static bool first_time = true; - - if (first_time) { - enable_i2c0_pin_mux(); - i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, - CONFIG_SYS_OMAP24_I2C_SLAVE); - first_time = false; - } -} - -void scale_vcores(void) -{ - const struct dpll_params *mpu_params; - - /* Ensure I2C is initialized for PMIC configuration */ - gpi2c_init(); - - /* Get the frequency */ - mpu_params = get_dpll_mpu_params(); - - if (board_is_idk()) - scale_vcores_idk(mpu_params->m); - else - scale_vcores_generic(mpu_params->m); -} - -void set_uart_mux_conf(void) -{ - enable_uart0_pin_mux(); -} - -void set_mux_conf_regs(void) -{ - enable_board_pin_mux(); -} - -static void enable_vtt_regulator(void) -{ - u32 temp; - - /* enable module */ - writel(GPIO_CTRL_ENABLEMODULE, AM33XX_GPIO5_BASE + OMAP_GPIO_CTRL); - - /* enable output for GPIO5_7 */ - writel(GPIO_SETDATAOUT(7), - AM33XX_GPIO5_BASE + OMAP_GPIO_SETDATAOUT); - temp = readl(AM33XX_GPIO5_BASE + OMAP_GPIO_OE); - temp = temp & ~(GPIO_OE_ENABLE(7)); - writel(temp, AM33XX_GPIO5_BASE + OMAP_GPIO_OE); -} - -enum { - RTC_BOARD_EPOS = 1, - RTC_BOARD_EVM14, - RTC_BOARD_EVM12, - RTC_BOARD_GPEVM, - RTC_BOARD_SK, -}; - -/* - * In the rtc_only+DRR in self-refresh boot path we have the board type info - * in the rtc scratch pad register hence we bypass the costly i2c reads to - * eeprom and directly programthe board name string - */ -void rtc_only_update_board_type(u32 btype) -{ - const char *name = ""; - const char *rev = "1.0"; - - switch (btype) { - case RTC_BOARD_EPOS: - name = "AM43EPOS"; - break; - case RTC_BOARD_EVM14: - name = "AM43__GP"; - rev = "1.4"; - break; - case RTC_BOARD_EVM12: - name = "AM43__GP"; - rev = "1.2"; - break; - case RTC_BOARD_GPEVM: - name = "AM43__GP"; - break; - case RTC_BOARD_SK: - name = "AM43__SK"; - break; - } - ti_i2c_eeprom_am_set(name, rev); -} - -u32 rtc_only_get_board_type(void) -{ - if (board_is_eposevm()) - return RTC_BOARD_EPOS; - else if (board_is_evm_14_or_later()) - return RTC_BOARD_EVM14; - else if (board_is_evm_12_or_later()) - return RTC_BOARD_EVM12; - else if (board_is_gpevm()) - return RTC_BOARD_GPEVM; - else if (board_is_sk()) - return RTC_BOARD_SK; - - return 0; -} - -void sdram_init(void) -{ - /* - * EPOS EVM has 1GB LPDDR2 connected to EMIF. - * GP EMV has 1GB DDR3 connected to EMIF - * along with VTT regulator. - */ - if (board_is_eposevm()) { - config_ddr(0, &ioregs_lpddr2, NULL, NULL, &emif_regs_lpddr2, 0); - } else if (board_is_evm_14_or_later()) { - enable_vtt_regulator(); - config_ddr(0, &ioregs_ddr3, NULL, NULL, - &ddr3_emif_regs_400Mhz_production, 0); - } else if (board_is_evm_12_or_later()) { - enable_vtt_regulator(); - config_ddr(0, &ioregs_ddr3, NULL, NULL, - &ddr3_emif_regs_400Mhz_beta, 0); - } else if (board_is_evm()) { - enable_vtt_regulator(); - config_ddr(0, &ioregs_ddr3, NULL, NULL, - &ddr3_emif_regs_400Mhz, 0); - } else if (board_is_sk()) { - config_ddr(400, &ioregs_ddr3, NULL, NULL, - &ddr3_sk_emif_regs_400Mhz, 0); - } else if (board_is_idk()) { - config_ddr(400, &ioregs_ddr3, NULL, NULL, - &ddr3_idk_emif_regs_400Mhz, 0); - } -} -#endif - -/* setup board specific PMIC */ -int power_init_board(void) -{ - struct pmic *p; - - if (board_is_idk()) { - power_tps62362_init(I2C_PMIC); - p = pmic_get("TPS62362"); - if (p && !pmic_probe(p)) - puts("PMIC: TPS62362\n"); - } else { - power_tps65218_init(I2C_PMIC); - p = pmic_get("TPS65218_PMIC"); - if (p && !pmic_probe(p)) - puts("PMIC: TPS65218\n"); - } - - return 0; -} - -int board_init(void) -{ - struct l3f_cfg_bwlimiter *bwlimiter = (struct l3f_cfg_bwlimiter *)L3F_CFG_BWLIMITER; - u32 mreqprio_0, mreqprio_1, modena_init0_bw_fractional, - modena_init0_bw_integer, modena_init0_watermark_0; - - gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; - gpmc_init(); - - /* - * Call this to initialize *ctrl again - */ - hw_data_init(); - - /* Clear all important bits for DSS errata that may need to be tweaked*/ - mreqprio_0 = readl(&cdev->mreqprio_0) & MREQPRIO_0_SAB_INIT1_MASK & - MREQPRIO_0_SAB_INIT0_MASK; - - mreqprio_1 = readl(&cdev->mreqprio_1) & MREQPRIO_1_DSS_MASK; - - modena_init0_bw_fractional = readl(&bwlimiter->modena_init0_bw_fractional) & - BW_LIMITER_BW_FRAC_MASK; - - modena_init0_bw_integer = readl(&bwlimiter->modena_init0_bw_integer) & - BW_LIMITER_BW_INT_MASK; - - modena_init0_watermark_0 = readl(&bwlimiter->modena_init0_watermark_0) & - BW_LIMITER_BW_WATERMARK_MASK; - - /* Setting MReq Priority of the DSS*/ - mreqprio_0 |= 0x77; - - /* - * Set L3 Fast Configuration Register - * Limiting bandwith for ARM core to 700 MBPS - */ - modena_init0_bw_fractional |= 0x10; - modena_init0_bw_integer |= 0x3; - - writel(mreqprio_0, &cdev->mreqprio_0); - writel(mreqprio_1, &cdev->mreqprio_1); - - writel(modena_init0_bw_fractional, &bwlimiter->modena_init0_bw_fractional); - writel(modena_init0_bw_integer, &bwlimiter->modena_init0_bw_integer); - writel(modena_init0_watermark_0, &bwlimiter->modena_init0_watermark_0); - - return 0; -} - -#ifdef CONFIG_BOARD_LATE_INIT -int board_late_init(void) -{ -#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG - set_board_info_env(NULL); - - /* - * Default FIT boot on HS devices. Non FIT images are not allowed - * on HS devices. - */ - if (get_device_type() == HS_DEVICE) - env_set("boot_fit", "1"); -#endif - return 0; -} -#endif - -#ifdef CONFIG_USB_DWC3 -static struct dwc3_device usb_otg_ss1 = { - .maximum_speed = USB_SPEED_HIGH, - .base = USB_OTG_SS1_BASE, - .tx_fifo_resize = false, - .index = 0, -}; - -static struct dwc3_omap_device usb_otg_ss1_glue = { - .base = (void *)USB_OTG_SS1_GLUE_BASE, - .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, - .index = 0, -}; - -static struct ti_usb_phy_device usb_phy1_device = { - .usb2_phy_power = (void *)USB2_PHY1_POWER, - .index = 0, -}; - -static struct dwc3_device usb_otg_ss2 = { - .maximum_speed = USB_SPEED_HIGH, - .base = USB_OTG_SS2_BASE, - .tx_fifo_resize = false, - .index = 1, -}; - -static struct dwc3_omap_device usb_otg_ss2_glue = { - .base = (void *)USB_OTG_SS2_GLUE_BASE, - .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, - .index = 1, -}; - -static struct ti_usb_phy_device usb_phy2_device = { - .usb2_phy_power = (void *)USB2_PHY2_POWER, - .index = 1, -}; - -int usb_gadget_handle_interrupts(int index) -{ - u32 status; - - status = dwc3_omap_uboot_interrupt_status(index); - if (status) - dwc3_uboot_handle_interrupt(index); - - return 0; -} -#endif /* CONFIG_USB_DWC3 */ - -#if defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) -int board_usb_init(int index, enum usb_init_type init) -{ - enable_usb_clocks(index); -#ifdef CONFIG_USB_DWC3 - switch (index) { - case 0: - if (init == USB_INIT_DEVICE) { - usb_otg_ss1.dr_mode = USB_DR_MODE_PERIPHERAL; - usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; - dwc3_omap_uboot_init(&usb_otg_ss1_glue); - ti_usb_phy_uboot_init(&usb_phy1_device); - dwc3_uboot_init(&usb_otg_ss1); - } - break; - case 1: - if (init == USB_INIT_DEVICE) { - usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL; - usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; - ti_usb_phy_uboot_init(&usb_phy2_device); - dwc3_omap_uboot_init(&usb_otg_ss2_glue); - dwc3_uboot_init(&usb_otg_ss2); - } - break; - default: - printf("Invalid Controller Index\n"); - } -#endif - - return 0; -} - -int board_usb_cleanup(int index, enum usb_init_type init) -{ -#ifdef CONFIG_USB_DWC3 - switch (index) { - case 0: - case 1: - if (init == USB_INIT_DEVICE) { - ti_usb_phy_uboot_exit(index); - dwc3_uboot_exit(index); - dwc3_omap_uboot_exit(index); - } - break; - default: - printf("Invalid Controller Index\n"); - } -#endif - disable_usb_clocks(index); - - return 0; -} -#endif /* defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) */ - -#ifdef CONFIG_DRIVER_TI_CPSW - -static void cpsw_control(int enabled) -{ - /* Additional controls can be added here */ - return; -} - -static struct cpsw_slave_data cpsw_slaves[] = { - { - .slave_reg_ofs = 0x208, - .sliver_reg_ofs = 0xd80, - .phy_addr = 16, - }, - { - .slave_reg_ofs = 0x308, - .sliver_reg_ofs = 0xdc0, - .phy_addr = 1, - }, -}; - -static struct cpsw_platform_data cpsw_data = { - .mdio_base = CPSW_MDIO_BASE, - .cpsw_base = CPSW_BASE, - .mdio_div = 0xff, - .channels = 8, - .cpdma_reg_ofs = 0x800, - .slaves = 1, - .slave_data = cpsw_slaves, - .ale_reg_ofs = 0xd00, - .ale_entries = 1024, - .host_port_reg_ofs = 0x108, - .hw_stats_reg_ofs = 0x900, - .bd_ram_ofs = 0x2000, - .mac_control = (1 << 5), - .control = cpsw_control, - .host_port_num = 0, - .version = CPSW_CTRL_VERSION_2, -}; - -int board_eth_init(bd_t *bis) -{ - int rv; - uint8_t mac_addr[6]; - uint32_t mac_hi, mac_lo; - - /* try reading mac address from efuse */ - mac_lo = readl(&cdev->macid0l); - mac_hi = readl(&cdev->macid0h); - mac_addr[0] = mac_hi & 0xFF; - mac_addr[1] = (mac_hi & 0xFF00) >> 8; - mac_addr[2] = (mac_hi & 0xFF0000) >> 16; - mac_addr[3] = (mac_hi & 0xFF000000) >> 24; - mac_addr[4] = mac_lo & 0xFF; - mac_addr[5] = (mac_lo & 0xFF00) >> 8; - - if (!env_get("ethaddr")) { - puts("<ethaddr> not set. Validating first E-fuse MAC\n"); - if (is_valid_ethaddr(mac_addr)) - eth_env_set_enetaddr("ethaddr", mac_addr); - } - - mac_lo = readl(&cdev->macid1l); - mac_hi = readl(&cdev->macid1h); - mac_addr[0] = mac_hi & 0xFF; - mac_addr[1] = (mac_hi & 0xFF00) >> 8; - mac_addr[2] = (mac_hi & 0xFF0000) >> 16; - mac_addr[3] = (mac_hi & 0xFF000000) >> 24; - mac_addr[4] = mac_lo & 0xFF; - mac_addr[5] = (mac_lo & 0xFF00) >> 8; - - if (!env_get("eth1addr")) { - if (is_valid_ethaddr(mac_addr)) - eth_env_set_enetaddr("eth1addr", mac_addr); - } - - if (board_is_eposevm()) { - writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); - cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII; - cpsw_slaves[0].phy_addr = 16; - } else if (board_is_sk()) { - writel(RGMII_MODE_ENABLE, &cdev->miisel); - cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII; - cpsw_slaves[0].phy_addr = 4; - cpsw_slaves[1].phy_addr = 5; - } else if (board_is_idk()) { - writel(RGMII_MODE_ENABLE, &cdev->miisel); - cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII; - cpsw_slaves[0].phy_addr = 0; - } else { - writel(RGMII_MODE_ENABLE, &cdev->miisel); - cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII; - cpsw_slaves[0].phy_addr = 0; - } - - rv = cpsw_register(&cpsw_data); - if (rv < 0) - printf("Error %d registering CPSW switch\n", rv); - - return rv; -} -#endif - -#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) -int ft_board_setup(void *blob, bd_t *bd) -{ - ft_cpu_setup(blob, bd); - - return 0; -} -#endif - -#if defined(CONFIG_SPL_LOAD_FIT) || defined(CONFIG_DTB_RESELECT) -int board_fit_config_name_match(const char *name) -{ - bool eeprom_read = board_ti_was_eeprom_read(); - - if (!strcmp(name, "am4372-generic") && !eeprom_read) - return 0; - else if (board_is_evm() && !strcmp(name, "am437x-gp-evm")) - return 0; - else if (board_is_sk() && !strcmp(name, "am437x-sk-evm")) - return 0; - else if (board_is_eposevm() && !strcmp(name, "am43x-epos-evm")) - return 0; - else if (board_is_idk() && !strcmp(name, "am437x-idk-evm")) - return 0; - else - return -1; -} -#endif - -#ifdef CONFIG_DTB_RESELECT -int embedded_dtb_select(void) -{ - do_board_detect(); - fdtdec_setup(); - - return 0; -} -#endif - -#ifdef CONFIG_TI_SECURE_DEVICE -void board_fit_image_post_process(void **p_image, size_t *p_size) -{ - secure_boot_verify_image(p_image, p_size); -} - -void board_tee_image_process(ulong tee_image, size_t tee_size) -{ - secure_tee_install((u32)tee_image); -} - -U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process); -#endif diff --git a/board/ti/am43xx/board.h b/board/ti/am43xx/board.h deleted file mode 100644 index 06b737445d4..00000000000 --- a/board/ti/am43xx/board.h +++ /dev/null @@ -1,62 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * board.h - * - * TI AM437x boards information header - * Derived from AM335x board. - * - * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ - */ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -#include <asm/arch/omap.h> - -#define DEV_ATTR_MAX_OFFSET 5 -#define DEV_ATTR_MIN_OFFSET 0 - -static inline int board_is_eposevm(void) -{ - return board_ti_is("AM43EPOS"); -} - -static inline int board_is_gpevm(void) -{ - return board_ti_is("AM43__GP"); -} - -static inline int board_is_sk(void) -{ - return board_ti_is("AM43__SK"); -} - -static inline int board_is_idk(void) -{ - return board_ti_is("AM43_IDK"); -} - -static inline int board_is_hsevm(void) -{ - return board_ti_is("AM43XXHS"); -} - -static inline int board_is_evm(void) -{ - return board_is_gpevm() || board_is_hsevm(); -} - -static inline int board_is_evm_14_or_later(void) -{ - return board_is_evm() && strncmp("1.4", board_ti_get_rev(), 3) <= 0; -} - -static inline int board_is_evm_12_or_later(void) -{ - return board_is_evm() && strncmp("1.2", board_ti_get_rev(), 3) <= 0; -} - -void enable_uart0_pin_mux(void); -void enable_board_pin_mux(void); -void enable_i2c0_pin_mux(void); -#endif diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c deleted file mode 100644 index a61987e4c6a..00000000000 --- a/board/ti/am43xx/mux.c +++ /dev/null @@ -1,153 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * mux.c - * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - */ - -#include <common.h> -#include <asm/arch/sys_proto.h> -#include <asm/arch/mux.h> -#include "../common/board_detect.h" -#include "board.h" - -static struct module_pin_mux rmii1_pin_mux[] = { - {OFFSET(mii1_txen), MODE(1)}, /* RMII1_TXEN */ - {OFFSET(mii1_txd1), MODE(1)}, /* RMII1_TD1 */ - {OFFSET(mii1_txd0), MODE(1)}, /* RMII1_TD0 */ - {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RMII1_RD1 */ - {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RMII1_RD0 */ - {OFFSET(mii1_rxdv), MODE(1) | RXACTIVE}, /* RMII1_RXDV */ - {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS_DV */ - {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE}, /* RMII1_RXERR */ - {OFFSET(rmii1_refclk), MODE(0) | RXACTIVE}, /* RMII1_refclk */ - {-1}, -}; - -static struct module_pin_mux rgmii1_pin_mux[] = { - {OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */ - {OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */ - {OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */ - {OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */ - {OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */ - {OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */ - {OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */ - {OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */ - {OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */ - {OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */ - {OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */ - {OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */ - {-1}, -}; - -static struct module_pin_mux mdio_pin_mux[] = { - {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */ - {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */ - {-1}, -}; - -static struct module_pin_mux uart0_pin_mux[] = { - {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)}, - {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS | PULLUP_EN | SLEWCTRL)}, - {-1}, -}; - -static struct module_pin_mux mmc0_pin_mux[] = { - {OFFSET(mmc0_clk), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* MMC0_CLK */ - {OFFSET(mmc0_cmd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_CMD */ - {OFFSET(mmc0_dat0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT0 */ - {OFFSET(mmc0_dat1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT1 */ - {OFFSET(mmc0_dat2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT2 */ - {OFFSET(mmc0_dat3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* MMC0_DAT3 */ - {-1}, -}; - -static struct module_pin_mux i2c0_pin_mux[] = { - {OFFSET(i2c0_sda), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)}, - {OFFSET(i2c0_scl), (MODE(0) | PULLUP_EN | RXACTIVE | SLEWCTRL)}, - {-1}, -}; - -static struct module_pin_mux gpio5_7_pin_mux[] = { - {OFFSET(spi0_cs0), (MODE(7) | PULLUP_EN)}, /* GPIO5_7 */ - {-1}, -}; - -#ifdef CONFIG_NAND -static struct module_pin_mux nand_pin_mux[] = { - {OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD0 */ - {OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD1 */ - {OFFSET(gpmc_ad2), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD2 */ - {OFFSET(gpmc_ad3), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD3 */ - {OFFSET(gpmc_ad4), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD4 */ - {OFFSET(gpmc_ad5), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD5 */ - {OFFSET(gpmc_ad6), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD6 */ - {OFFSET(gpmc_ad7), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD7 */ -#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT - {OFFSET(gpmc_ad8), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD8 */ - {OFFSET(gpmc_ad9), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD9 */ - {OFFSET(gpmc_ad10), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD10 */ - {OFFSET(gpmc_ad11), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD11 */ - {OFFSET(gpmc_ad12), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD12 */ - {OFFSET(gpmc_ad13), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD13 */ - {OFFSET(gpmc_ad14), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD14 */ - {OFFSET(gpmc_ad15), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* AD15 */ -#endif - {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* Wait */ - {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)}, /* Write Protect */ - {OFFSET(gpmc_csn0), (MODE(0) | PULLUP_EN)}, /* Chip-Select */ - {OFFSET(gpmc_wen), (MODE(0) | PULLDOWN_EN)}, /* Write Enable */ - {OFFSET(gpmc_oen_ren), (MODE(0) | PULLDOWN_EN)}, /* Read Enable */ - {OFFSET(gpmc_advn_ale), (MODE(0) | PULLDOWN_EN)}, /* Addr Latch Enable*/ - {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLDOWN_EN)}, /* Byte Enable */ - {-1}, -}; -#endif - -static __maybe_unused struct module_pin_mux qspi_pin_mux[] = { - {OFFSET(gpmc_csn0), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_CS0 */ - {OFFSET(gpmc_csn3), (MODE(2) | PULLUP_EN | RXACTIVE)}, /* QSPI_CLK */ - {OFFSET(gpmc_advn_ale), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D0 */ - {OFFSET(gpmc_oen_ren), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D1 */ - {OFFSET(gpmc_wen), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D2 */ - {OFFSET(gpmc_be0n_cle), (MODE(3) | PULLUP_EN | RXACTIVE)}, /* QSPI_D3 */ - {-1}, -}; - -void enable_uart0_pin_mux(void) -{ - configure_module_pin_mux(uart0_pin_mux); -} - -void enable_board_pin_mux(void) -{ - configure_module_pin_mux(mmc0_pin_mux); - configure_module_pin_mux(i2c0_pin_mux); - configure_module_pin_mux(mdio_pin_mux); - - if (board_is_evm()) { - configure_module_pin_mux(gpio5_7_pin_mux); - configure_module_pin_mux(rgmii1_pin_mux); -#if defined(CONFIG_NAND) - configure_module_pin_mux(nand_pin_mux); -#endif - } else if (board_is_sk() || board_is_idk()) { - configure_module_pin_mux(rgmii1_pin_mux); -#if defined(CONFIG_NAND) - printf("Error: NAND flash not present on this board\n"); -#endif - configure_module_pin_mux(qspi_pin_mux); - } else if (board_is_eposevm()) { - configure_module_pin_mux(rmii1_pin_mux); -#if defined(CONFIG_NAND) - configure_module_pin_mux(nand_pin_mux); -#else - configure_module_pin_mux(qspi_pin_mux); -#endif - } -} - -void enable_i2c0_pin_mux(void) -{ - configure_module_pin_mux(i2c0_pin_mux); -} diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig deleted file mode 100644 index 7601263be47..00000000000 --- a/configs/am43xx_evm_defconfig +++ /dev/null @@ -1,61 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_AM43XX=y -CONFIG_SPL=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_SPL_LOAD_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_MISC_INIT_R is not set -CONFIG_VERSION_VARIABLE=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_OS_BOOT=y -CONFIG_CMD_SPL=y -CONFIG_CMD_SPL_NAND_OFS=0x00100000 -CONFIG_CMD_SPL_WRITE_SIZE=0x40000 -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_NAND=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)" -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" -CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm" -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y -# CONFIG_BLK is not set -CONFIG_DFU_MMC=y -CONFIG_DFU_RAM=y -CONFIG_DFU_SF=y -CONFIG_DM_GPIO=y -CONFIG_DM_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_NAND=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_PHY_GIGE=y -CONFIG_MII=y -CONFIG_DM_SERIAL=y -CONFIG_SPI=y -CONFIG_TI_QSPI=y -CONFIG_TIMER=y -CONFIG_OMAP_TIMER=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" -CONFIG_USB_GADGET_VENDOR_NUM=0x0403 -CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 -CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/am43xx_evm_ethboot_defconfig b/configs/am43xx_evm_ethboot_defconfig deleted file mode 100644 index ea46236bc43..00000000000 --- a/configs/am43xx_evm_ethboot_defconfig +++ /dev/null @@ -1,65 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_AM43XX=y -CONFIG_SPL=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_MISC_INIT_R is not set -CONFIG_VERSION_VARIABLE=y -# CONFIG_SPL_SYS_MALLOC_SIMPLE is not set -CONFIG_SPL_ETH_SUPPORT=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_NET_SUPPORT=y -CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL" -CONFIG_SPL_OS_BOOT=y -CONFIG_CMD_SPL=y -CONFIG_CMD_SPL_NAND_OFS=0x00100000 -CONFIG_CMD_SPL_WRITE_SIZE=0x40000 -CONFIG_CMD_ASKENV=y -CONFIG_CMD_EEPROM=y -CONFIG_CMD_DFU=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)" -CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DFU_MMC=y -CONFIG_DFU_RAM=y -CONFIG_DFU_SF=y -CONFIG_MMC_OMAP_HS=y -CONFIG_NAND=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_TI_QSPI=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" -CONFIG_USB_GADGET_VENDOR_NUM=0x0403 -CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_OF_LIBFDT=y diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig deleted file mode 100644 index c38fdc19212..00000000000 --- a/configs/am43xx_evm_qspiboot_defconfig +++ /dev/null @@ -1,63 +0,0 @@ -CONFIG_ARM=y -# CONFIG_SYS_THUMB_BUILD is not set -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_TEXT_BASE=0x30000000 -CONFIG_AM43XX=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,QSPI,QSPI_BOOT" -CONFIG_QSPI_BOOT=y -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_MISC_INIT_R is not set -CONFIG_VERSION_VARIABLE=y -CONFIG_BOARD_EARLY_INIT_F=y -CONFIG_CMD_ASKENV=y -CONFIG_CMD_EEPROM=y -CONFIG_CMD_DFU=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_EXT4_WRITE=y -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm" -CONFIG_OF_LIST="am4372-generic am437x-sk-evm am437x-idk-evm" -CONFIG_DTB_RESELECT=y -CONFIG_MULTI_DTB_FIT=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y -# CONFIG_BLK is not set -CONFIG_DFU_MMC=y -CONFIG_DFU_RAM=y -CONFIG_DFU_SF=y -CONFIG_DM_GPIO=y -CONFIG_DM_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_MII=y -CONFIG_SYS_NS16550=y -CONFIG_SPI=y -CONFIG_TI_QSPI=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" -CONFIG_USB_GADGET_VENDOR_NUM=0x0403 -CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 -CONFIG_USB_GADGET_DOWNLOAD=y -CONFIG_FAT_WRITE=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig deleted file mode 100644 index 2d54d1aaf0f..00000000000 --- a/configs/am43xx_evm_rtconly_defconfig +++ /dev/null @@ -1,62 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_AM43XX=y -CONFIG_SPL_RTC_DDR_SUPPORT=y -CONFIG_SPL=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_SPL_LOAD_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_MISC_INIT_R is not set -CONFIG_VERSION_VARIABLE=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_OS_BOOT=y -CONFIG_CMD_SPL=y -CONFIG_CMD_SPL_NAND_OFS=0x00100000 -CONFIG_CMD_SPL_WRITE_SIZE=0x40000 -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_NAND=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)" -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" -CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm" -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y -# CONFIG_BLK is not set -CONFIG_DFU_MMC=y -CONFIG_DFU_RAM=y -CONFIG_DFU_SF=y -CONFIG_DM_GPIO=y -CONFIG_DM_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_NAND=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_PHY_GIGE=y -CONFIG_MII=y -CONFIG_DM_SERIAL=y -CONFIG_SPI=y -CONFIG_TI_QSPI=y -CONFIG_TIMER=y -CONFIG_OMAP_TIMER=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" -CONFIG_USB_GADGET_VENDOR_NUM=0x0403 -CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 -CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig deleted file mode 100644 index 27138335441..00000000000 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ /dev/null @@ -1,75 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_AM43XX=y -CONFIG_ISW_ENTRY_ADDR=0x40300350 -CONFIG_SPL=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_SPL_LOAD_FIT=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_MISC_INIT_R is not set -CONFIG_VERSION_VARIABLE=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_OS_BOOT=y -CONFIG_SPL_USB_HOST_SUPPORT=y -CONFIG_SPL_USB_SUPPORT=y -CONFIG_CMD_SPL=y -CONFIG_CMD_SPL_NAND_OFS=0x00100000 -CONFIG_CMD_SPL_WRITE_SIZE=0x40000 -CONFIG_CMD_ASKENV=y -CONFIG_CMD_EEPROM=y -CONFIG_CMD_DFU=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_GPIO=y -CONFIG_CMD_GPT=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MMC=y -CONFIG_CMD_NAND=y -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -CONFIG_CMD_USB=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_EXT4_WRITE=y -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)" -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" -CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm" -CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y -# CONFIG_BLK is not set -CONFIG_DFU_MMC=y -CONFIG_DFU_RAM=y -CONFIG_DFU_SF=y -CONFIG_DM_GPIO=y -CONFIG_DM_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_NAND=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_PHY_GIGE=y -CONFIG_MII=y -CONFIG_DM_SERIAL=y -CONFIG_SPI=y -CONFIG_TI_QSPI=y -CONFIG_TIMER=y -CONFIG_OMAP_TIMER=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" -CONFIG_USB_GADGET_VENDOR_NUM=0x0403 -CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 -CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig deleted file mode 100644 index aaf8d10fecb..00000000000 --- a/configs/am43xx_hs_evm_defconfig +++ /dev/null @@ -1,72 +0,0 @@ -CONFIG_ARM=y -CONFIG_ARCH_OMAP2PLUS=y -CONFIG_TI_SECURE_DEVICE=y -CONFIG_TI_COMMON_CMD_OPTIONS=y -CONFIG_SYS_MALLOC_F_LEN=0x2000 -CONFIG_AM43XX=y -CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000 -CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 -CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 -CONFIG_ISW_ENTRY_ADDR=0x403018e0 -CONFIG_SPL=y -CONFIG_DISTRO_DEFAULTS=y -CONFIG_FIT_IMAGE_POST_PROCESS=y -CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y -CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" -# CONFIG_USE_BOOTCOMMAND is not set -CONFIG_SYS_CONSOLE_INFO_QUIET=y -# CONFIG_MISC_INIT_R is not set -CONFIG_VERSION_VARIABLE=y -CONFIG_SPL_ETH_SUPPORT=y -CONFIG_SPL_MTD_SUPPORT=y -CONFIG_SPL_NET_SUPPORT=y -CONFIG_SPL_NET_VCI_STRING="AM43xx U-Boot SPL" -CONFIG_SPL_USB_HOST_SUPPORT=y -CONFIG_SPL_USB_SUPPORT=y -CONFIG_SPL_USB_GADGET_SUPPORT=y -CONFIG_SPL_USB_ETHER=y -# CONFIG_CMD_FLASH is not set -CONFIG_CMD_NAND=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_MTDPARTS=y -CONFIG_MTDIDS_DEFAULT="nand0=nand.0" -CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(NAND.SPL),256k(NAND.SPL.backup1),256k(NAND.SPL.backup2),256k(NAND.SPL.backup3),512k(NAND.u-boot-spl-os),1m(NAND.u-boot),256k(NAND.u-boot-env),256k(NAND.u-boot-env.backup1),7m(NAND.kernel),-(NAND.file-system)" -CONFIG_OF_CONTROL=y -CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" -CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm" -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y -CONFIG_DM=y -# CONFIG_BLK is not set -CONFIG_DFU_MMC=y -CONFIG_DFU_RAM=y -CONFIG_DFU_SF=y -CONFIG_DM_GPIO=y -CONFIG_DM_MMC=y -CONFIG_MMC_OMAP_HS=y -CONFIG_NAND=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_MACRONIX=y -CONFIG_DRIVER_TI_CPSW=y -CONFIG_PHY_GIGE=y -CONFIG_MII=y -CONFIG_DM_SERIAL=y -CONFIG_SPI=y -CONFIG_TI_QSPI=y -CONFIG_TIMER=y -CONFIG_OMAP_TIMER=y -CONFIG_USB=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_DWC3=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_GADGET=y -CONFIG_USB_DWC3_OMAP=y -CONFIG_USB_DWC3_PHY_OMAP=y -CONFIG_OMAP_USB_PHY=y -CONFIG_USB_STORAGE=y -CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments" -CONFIG_USB_GADGET_VENDOR_NUM=0x0403 -CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00 -CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h deleted file mode 100644 index 9d0d3424786..00000000000 --- a/include/configs/am43xx_evm.h +++ /dev/null @@ -1,292 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * am43xx_evm.h - * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ - */ - -#ifndef __CONFIG_AM43XX_EVM_H -#define __CONFIG_AM43XX_EVM_H - -#define CONFIG_ARCH_CPU_INIT -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */ -#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ - -#include <asm/arch/omap.h> - -/* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_CLK 48000000 -#if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL) -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_SERIAL -#endif - -/* I2C Configuration */ -#define CONFIG_ENV_EEPROM_IS_ON_I2C -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 - -/* Power */ -#define CONFIG_POWER -#define CONFIG_POWER_I2C -#define CONFIG_POWER_TPS65218 -#define CONFIG_POWER_TPS62362 - -/* SPL defines. */ -#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR -#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ - (128 << 20)) - -/* Enabling L2 Cache */ -#define CONFIG_SYS_L2_PL310 -#define CONFIG_SYS_PL310_BASE 0x48242000 - -/* - * Since SPL did pll and ddr initialization for us, - * we don't need to do it twice. - */ -#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT) -#define CONFIG_SKIP_LOWLEVEL_INIT -#endif - -/* - * When building U-Boot such that there is no previous loader - * we need to call board_early_init_f. This is taken care of in - * s_init when we have SPL used. - */ - -/* Now bring in the rest of the common code. */ -#include <configs/ti_armv7_omap.h> - -/* Always 64 KiB env size */ -#define CONFIG_ENV_SIZE (64 << 10) - -/* Clock Defines */ -#define V_OSCK 24000000 /* Clock output from T2 */ -#define V_SCLK (V_OSCK) - -/* NS16550 Configuration */ -#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ - -/* SPL USB Support */ - -#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD) -#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1 -#define CONFIG_USB_XHCI_OMAP - -#define CONFIG_AM437X_USB2PHY2_HOST -#endif - -#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USB_ETHER) -#undef CONFIG_USB_DWC3_PHY_OMAP -#undef CONFIG_USB_DWC3_OMAP -#undef CONFIG_USB_DWC3 -#undef CONFIG_USB_DWC3_GADGET - -#undef CONFIG_USB_GADGET_DOWNLOAD -#undef CONFIG_USB_GADGET_VBUS_DRAW -#undef CONFIG_USB_GADGET_MANUFACTURER -#undef CONFIG_USB_GADGET_VENDOR_NUM -#undef CONFIG_USB_GADGET_PRODUCT_NUM -#undef CONFIG_USB_GADGET_DUALSPEED -#endif - -/* - * Disable MMC DM for SPL build and can be re-enabled after adding - * DM support in SPL - */ -#ifdef CONFIG_SPL_BUILD -#undef CONFIG_TIMER -#endif - -#ifndef CONFIG_SPL_BUILD -/* USB Device Firmware Update support */ -#define DFUARGS \ - "dfu_bufsiz=0x10000\0" \ - DFU_ALT_INFO_MMC \ - DFU_ALT_INFO_EMMC \ - DFU_ALT_INFO_RAM \ - DFU_ALT_INFO_QSPI_XIP -#else -#define DFUARGS -#endif - -#ifdef CONFIG_QSPI_BOOT -#define CONFIG_SYS_REDUNDAND_ENVIRONMENT -#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED -#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ -#define CONFIG_ENV_OFFSET 0x110000 -#define CONFIG_ENV_OFFSET_REDUND 0x120000 -#endif - -/* SPI */ -#define CONFIG_TI_SPI_MMAP -#define CONFIG_QSPI_SEL_GPIO 48 -#define CONFIG_SF_DEFAULT_SPEED 48000000 -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 -#define CONFIG_QSPI_QUAD_SUPPORT -#define CONFIG_TI_EDMA3 - -#ifndef CONFIG_SPL_BUILD -#include <environment/ti/dfu.h> -#include <environment/ti/mmc.h> - -#define CONFIG_EXTRA_ENV_SETTINGS \ - DEFAULT_LINUX_BOOT_ENV \ - DEFAULT_MMC_TI_ARGS \ - DEFAULT_FIT_TI_ARGS \ - "fdtfile=undefined\0" \ - "bootpart=0:2\0" \ - "bootdir=/boot\0" \ - "bootfile=zImage\0" \ - "console=ttyO0,115200n8\0" \ - "partitions=" \ - "uuid_disk=${uuid_gpt_disk};" \ - "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ - "optargs=\0" \ - "usbroot=/dev/sda2 rw\0" \ - "usbrootfstype=ext4 rootwait\0" \ - "usbdev=0\0" \ - "ramroot=/dev/ram0 rw\0" \ - "ramrootfstype=ext2\0" \ - "usbargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "root=${usbroot} " \ - "rootfstype=${usbrootfstype}\0" \ - "ramargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "root=${ramroot} " \ - "rootfstype=${ramrootfstype}\0" \ - "loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \ - "usbboot=" \ - "setenv devnum ${usbdev}; " \ - "setenv devtype usb; " \ - "usb start ${usbdev}; " \ - "if usb dev ${usbdev}; then " \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run loadimage; then " \ - "run loadfdt; " \ - "echo Booting from usb ${usbdev}...; " \ - "run usbargs;" \ - "bootz ${loadaddr} - ${fdtaddr}; " \ - "fi;" \ - "fi\0" \ - "fi;" \ - "usb stop ${usbdev};\0" \ - "findfdt="\ - "if test $board_name = AM43EPOS; then " \ - "setenv fdtfile am43x-epos-evm.dtb; fi; " \ - "if test $board_name = AM43__GP; then " \ - "setenv fdtfile am437x-gp-evm.dtb; fi; " \ - "if test $board_name = AM43XXHS; then " \ - "setenv fdtfile am437x-gp-evm.dtb; fi; " \ - "if test $board_name = AM43__SK; then " \ - "setenv fdtfile am437x-sk-evm.dtb; fi; " \ - "if test $board_name = AM43_IDK; then " \ - "setenv fdtfile am437x-idk-evm.dtb; fi; " \ - "if test $fdtfile = undefined; then " \ - "echo WARNING: Could not determine device tree; fi; \0" \ - NANDARGS \ - NETARGS \ - DFUARGS \ - -#define CONFIG_BOOTCOMMAND \ - "if test ${boot_fit} -eq 1; then " \ - "run update_to_fit;" \ - "fi;" \ - "run findfdt; " \ - "run envboot;" \ - "run mmcboot;" \ - "run usbboot;" \ - NANDBOOT \ - -#endif - -#ifndef CONFIG_SPL_BUILD -/* CPSW Ethernet */ -#define CONFIG_BOOTP_DEFAULT -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_NET_RETRY_COUNT 10 -#endif - -#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ - -#define CONFIG_SYS_RX_ETH_BUFFER 64 - -/* NAND support */ -#ifdef CONFIG_NAND -/* NAND: device related configs */ -#define CONFIG_SYS_NAND_PAGE_SIZE 4096 -#define CONFIG_SYS_NAND_OOBSIZE 224 -#define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024) -#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ - CONFIG_SYS_NAND_PAGE_SIZE) -#define CONFIG_SYS_NAND_5_ADDR_CYCLE -/* NAND: driver related configs */ -#define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW -#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS -#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ - 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \ - 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \ - 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \ - 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \ - 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \ - 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \ - 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \ - 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \ - 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \ - 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \ - 110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \ - 120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \ - 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \ - 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \ - 150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \ - 160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \ - 170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \ - 180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \ - 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \ - 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \ - } -#define CONFIG_SYS_NAND_ECCSIZE 512 -#define CONFIG_SYS_NAND_ECCBYTES 26 -#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000 -/* NAND: SPL related configs */ -/* NAND: SPL falcon mode configs */ -#ifdef CONFIG_SPL_OS_BOOT -#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */ -#endif -#define NANDARGS \ - "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ - "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ - "nandargs=setenv bootargs console=${console} " \ - "${optargs} " \ - "root=${nandroot} " \ - "rootfstype=${nandrootfstype}\0" \ - "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \ - "nandrootfstype=ubifs rootwait=1\0" \ - "nandboot=echo Booting from nand ...; " \ - "run nandargs; " \ - "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ - "nand read ${loadaddr} NAND.kernel; " \ - "bootz ${loadaddr} - ${fdtaddr}\0" -#define NANDBOOT "run nandboot; " -#else /* !CONFIG_NAND */ -#define NANDARGS -#define NANDBOOT -#endif /* CONFIG_NAND */ - -#if defined(CONFIG_TI_SECURE_DEVICE) -/* Avoid relocating onto firewalled area at end of DRAM */ -#define CONFIG_PRAM (64 * 1024) -#endif /* CONFIG_TI_SECURE_DEVICE */ - -#endif /* __CONFIG_AM43XX_EVM_H */